Parallelized Sequential Composition and Hardware Weak Memory Models

Colvin, Robert

doi:10.1007/978-3-030-92124-8_12

Cited by 7 publications

(6 citation statements)

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“…As we show elsewhere [11,12,14], the parameter can be instantiated to give the behaviour of hardware weak memory models, but in this paper we focus mostly on C's memory model, denoted formally by ' ', and the special cases of sequential and parallel composition. The ⊲ operator essentially allows the construction of a sequence of instructions that may be reordered under some circumstances, similar to a hardware pipeline.…”

Section: Syntax and Semantics Of A Language With Instruction Reorderingmentioning

confidence: 99%

“…We now show how reordering according to the C memory model can be embedded into a more realistic imperative language that has conditionals and loops, based on the previously described wide-spectrum language IMP+pseq [11,12,14]. We give a small-step operational semantics and define trace equivalence for its notion of correctness.…”

Section: An Imperative Language With Reorderingmentioning

confidence: 99%

“…The Owicki-Gries method [63] can be used to prove a top-level Hoare-triple specification of parallel program c. If c involves reordering, then reducing c to some plain form allows the application of Owicki-Gries; several examples of this approach appear in [11].…”

Section: Owicki-griesmentioning

confidence: 99%

“…7) then the picture becomes more complex, but this can be analysed separately, and without regard to how such features interact with cross-thread, complex, abstract data structures controlling events. The reordering framework we present here is based on earlier work [11,12,14], which provides a model checker (written in Maude [9]) and machine-checked refinement rules (in Isabelle/HOL [60,64]) for the language in Sect. 3.2 (i.e., ignoring the possibility of incremental evaluation and optimisations) with forwarding (Sect.…”

Section: Related Workmentioning

confidence: 99%

“…Syntactically and semantically the key aspect is the parallelized sequential composition operator, formalising a processor-pipeline concept that has been around since the 1960s, and which has been previously shown to have good explanatory power for most behaviours observed on hardware weak memory models [11,12]. Reasoning in this setting involves making explicit at the program level what effects the memory model has, either reducing to a sequential form where the use of atomics.h features prevents the compiler or hardware from making problematic reorderings, or making the residual parallelism explicit; in either case, standard techniques (such as Owicki-Gries or rely/guarantee) apply to the reduced program.…”

Section: Introductionmentioning

confidence: 99%

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Separation of concerning things: a simpler basis for defining and programming with the C/C++ memory model (extended version)

Colvin¹

2022

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The C/C++ memory model provides an interface and execution model for programmers of concurrent (sharedvariable) code. It provides a range of mechanisms that abstract from underlying hardware memory modelsthat govern how multicore architectures handle concurrent accesses to main memory -as well as abstracting from compiler transformations. The C standard describes the memory model in terms of cross-thread relationships between events, and has been influenced by several research works that are similarly based. In this paper we provide a thread-local definition of the fundamental principles of the C memory model, which, for concise concurrent code, serves as a basis for relatively straightforward reasoning about the effects of the C ordering mechanisms. We argue that this definition is more practical from a programming perspective and is amenable to analysis by already established techniques for concurrent code. The key aspect is that the memory model definition is separate to other considerations of a rich programming language such as C, in particular, expression evaluation and optimisations, though we show how to reason about those considerations in the presence of C concurrency. A major simplification of our framework compared to the description in the C standard and related work in the literature is separating out considerations around the "lack of multicopy atomicity", a concept that is in any case irrelevant to developers of code for x86, Arm, RISC-V or SPARC architectures. We show how the framework is convenient for reasoning about well-structured code, and for formally addressing unintuitive behaviours such as "out-of-thin-air" writes.

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Section: Syntax and Semantics Of A Language With Instruction Reorderingmentioning

confidence: 99%

Section: An Imperative Language With Reorderingmentioning

confidence: 99%