Parallelizing HMMER for Hardware Acceleration on FPGAs

Derrien, Steven; Quinton, Patrice

doi:10.1109/asap.2007.4429951

Cited by 26 publications

(22 citation statements)

References 31 publications

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“…As the Viterbi algorithm has been used in many topics, such as pairwise alignments, multiple sequence alignment and gene prediction, there is much research focusing on the acceleration of the Viterbi algorithm [10][11] [12]. The acceleration of the Viterbi algorithm commonly utilizes a log-transformation of the original equations, which transform floating-point multiplication operations into floating-point addition operations.…”

Section: Related Workmentioning

confidence: 99%

FPGA acceleration of the pair-HMMs forward algorithm for DNA sequence analysis

Ren

Sima

Al-Ars

2015

2015 IEEE International Conference on Bioinformatics and Biomedicine (BIBM)

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Many DNA sequence analysis tools have been developed to turn the massive raw DNA sequencing data generated by NGS (Next Generation Sequencing) platforms into biologically meaningful information. The pair-HMMs forward algorithm is widely used to calculate the overall alignment probability needed by a number of DNA analysis tools. In this paper, we propose a novel systolic array design to accelerate the pair-HMMs forward algorithm on FPGAs. A number of architectural features have been implemented to improve the performance of the design, such as early exit points to increase the utilization of the array for small sequence sizes, as well as on-chip buffering to enable the processing of long sequences effectively. We present an implementation of the design on the Convey supercomputing platform. Experimental results show that the FPGA implementation of the pair-HMMs forward algorithm is up to 67x faster, compared to software-only execution.

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Section: Related Workmentioning

confidence: 99%

FPGA acceleration of the pair-HMMs forward algorithm for DNA sequence analysis

Ren

Sima

Al-Ars

2015

2015 IEEE International Conference on Bioinformatics and Biomedicine (BIBM)

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“…Automatic generation of systolic arrays to implement pipelined evaluation of uniform and affine recurrence equations 9 have been studied and found to give significant speedup for many problems. Numerous accelerators for HMMER and Smith-Waterman exist for which the evaluation time is decreased via a combination of architectural improvements, 8,[10][11][12] data path redesign, [13][14][15][16][17][18] and heuristics. 19,20 To our best knowledge, none of the accelerators mentioned above do rely exclusively on algorithmic improvement techniques as we do.…”

Section: Discussion and Related Workmentioning

confidence: 99%

Rolling partial prefix-sums to speedup evaluation of uniform and affine recurrence equations

Ganesan

Chamberlin

Buhler

et al. 2011

Modeling and Simulation for Defense Systems and Applications VI

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As multithreaded and reconfigurable logic architectures play an increasing role in high-performance computing (HPC), the scientific community is in need for new programming models for efficiently mapping existing applications to the new parallel platforms. In this paper, we show how we can effectively exploit tightly coupled fine-grained parallelism in architectures such as GPU and FPGA to speedup applications described by uniform recurrence equations. We introduce the concept of rolling partial-prefix sums to dynamically keep track of and resolve multiple dependencies without having to evaluate intermediary values. Rolling partial-prefix sums are applicable in low-latency evaluation of dynamic programming problems expressed as uniform or affine equations. To assess our approach, we consider two common problems in computational biology, hidden Markov models (HMMER) for protein motif finding and the Smith-Waterman algorithm. We present a platform independent, linear time solution to HMMER, which is traditionally solved in bilinear time, and a platform independent, sub-linear time solution to Smith-Waterman, which is normally solved in linear time.Keywords: Dynamic Programming, HMMER, Protein-Motif Finding, GPUs, Parallelization, Computational Biology GENERAL ROLLING PARTIAL PREFIX-SUMS ALGORITHMLet D be a finite domain of points. Each point can corresponds to a unique sub-problem or cell in a dynamic programming matrix. Let F be a function from D to a "result" domain Σ (e.g., the real numbers) that corresponds to the computation of the cost point in D. We seek to compute the values F (d) for a point d ∈ D. Let (Σ, ∧) form a commutative semigroup, i.e., the operator ∧ is a commutative, associative binary operator on results.Suppose that F (d) is computable for any d ∈ D as follows:where the summary is the natural extension of ∧ from two to any nonzero number of arguments. The summary operator maps two or more values in the results domain into a single value in the same domain. The function f i (d) is a mapping from multiple (finite number of) points in the domain D to one element in the results domain Σ. Here we consider only monadic recurrences where the function can be written as follows:where ⊕ is a binary extension operator on the results F (d ′ ) and h i (d) ∈ Σ is a "local" function that depends only on d, such as a look-up table and can be computed without the knowledge of any F (d). The relation d ′ < d must be satisfied, according to a partial order <, in order to avoid cyclic dependencies. The minimal elements of the partial order are "base" cases. A subset B of D is said to be "sufficient" for d if every path of dependency from d back to the base cases passes through an element of B. The nature of this dependency imposes a sequential execution of function F as dictated by the partial order. Therefore the number of algorithmic time-steps for sequential execution grows as the size of domain D modulo <, i.e., equal to total number of sets in D such that any two elements from different sets follow t...

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“…They get a 700 MCUPS on XC3S1500, but the emission storage is not introduced. Derrien, et al [13] have the same motivation with us in that they want to accelerate an individual query, but they work out their problem in a more complex way. They get a 330 MCUPS to 660MCUPS performance.…”

Section: Related Workmentioning

confidence: 99%

“…Many solutions [1] [11] [15] are based on the simplified HMM without a rare feedback loop in HMM, while other implementations accelerates full Plan7 HMM [14] [13]. FPGA and MPI are combined into an MPI-HMMER-Boost to achieve a better speedup [8].…”

Section: Introductionmentioning

confidence: 99%