Parity checking and generating circuit with semiconductor optical amplifier in all-optical domain

Nanoscale on-chip all-optical logic parity checker in integrated plasmonic circuits in optical communication range

“…A low-power CW laser beam can thus trigger the all-optical parity checking operation. The operating intensity of the signal light was as low as 100 kW/cm 2 in our experiment, and this represents a reduction of four orders of magnitude when compared with the corresponding values from previous reports 1 2 3 4 5 6 7 8 9 . Nozaki et al noted that the ultralow incident signal light intensity of only 100 kW/cm 2 is comparable with that of efficient ultralow-power all-optical switching devices based on silicon photonic crystal nanocavities 19 .…”

“…The parity checker function is performed using the U-shaped plasmonic waveguides, i.e., it is performed in the direction parallel to the plasmonic circuit surface, which guarantees the required on-chip operation characteristics. In our experiments, the incident signal light intensity was only 100 kW/cm 2 , which is four orders of magnitude lower than that of previously reported devices based on semiconductor optical amplifiers and third-order nonlinear optical materials 2 3 4 5 6 7 8 10 , while the overall feature size is reduced by more than two orders of magnitude and ultralow energy consumption is maintained. This work not only raises the possibility of realization of large-scale integrated information processing chips based on integrated plasmonic circuits, but also offers a way to overcome the intrinsic limitations of the serious losses of SPPs for on-chip integration applications.…”

“…Because of the strong field confinement effect of U-shaped plasmonic waveguides, the minimum feature size of the sample all-optical parity checker was only 15 μm, which is more than two orders of magnitude smaller than the previously reported results 1 2 3 4 5 6 7 8 9 . The mechanism for realization of the all-optical parity checker was based on linear interference of the SPPs, and there are thus no high-power requirements.…”

“…The all-optical logic parity checker must have several essential properties to be suitable for practical applications, including ultrasmall feature size, ultralow energy consumption, a high-intensity contrast ratio between the logic states 1 and 0, and on-chip operation capability. From a theoretical perspective, various schemes have been proposed for demonstration of the all-optical logic parity checking function, including use of the electro-optic effect in lithium niobate crystals 1 , semiconductor optical amplifiers 2 3 4 5 , third-order nonlinear optical materials 6 7 8 , and spatial light modulators 9 . From an experimental perspective, Poustie et al reported an all-optical parity checker with bit-differential delay that used semiconductor optical amplifiers with an operating threshold signal light intensity of the GW/cm 2 order 10 .…”

A DNA-based parity generator/checker for error detection through data transmission with visual readout and an output-correction function

“…As molecular-level computers carry out binary Boolean operations for data processing, untraditional molecular computing has attracted increasing interest across various research fields in recent years. 1 – 12 During any type of binary data transmission, the occurrence of bit errors 13 is an inevitable and frequent problem suffered. These errors, which have fatal effects on the correct logic computation, especially in complicated logic circuits, 9 , 14 , 15 can be checked through insertion of a parity generator (pG) at the transmitting end and a parity checker (pC) at the receiving end.…”