Partitioning-based approach to fast on-chip decap budgeting and minimization

Abstract

This paper proposes a fast decoupling capacitance (decap) allocation and budgeting algorithm for both early stage decap estimation and later stage decap minimization in today's VLSI physical design. The new method is based on a sensitivity-based conjugate gradient (CG) approach. But it adopts several new techniques, which significantly improve the efficiency of the optimization process. First, the new approach applies the time-domain merged adjoint network method for fast sensitivity calculation. Second, an efficient search step scheme is proposed to replace the timeconsuming line search phase in conventional conjugate gradient method for decap budget optimization. Third, instead of optimizing an entire large circuit, we partition the circuit into a number of smaller sub-circuits and optimize them separately by exploiting the locality of adding decaps. Experimental results show that the proposed algorithm achieves at least 10X speed-up over the fastest decap allocation method reported so far with similar or even better budget quality and a power grid circuit with about one million nodes can be optimized using the new method in half an hour on the latest Linux workstations.

Stochastic Optimization Over Correlated Data Set: A Case Study on VLSI Decoupling Capacitance Budgeting

“…Recently, (Zhao et al, 2006) used macromodeling and linear programming based approaches to solve the decap problem. However, same as the previous studies (Fu et al, 2004;Li et al, 2005;Su et al, 2003), it assumed a maximum current load at every port to guarantee the worst-case design scenario. The maximum current model is over pessimistic as it ignores operation variation.…”

“…To solve the decap budgeting problem, most work employs a sensitivity-based optimization technique, such as those solved by either linear programming (Zhao et al, 2006), quadratic programming (Su et al, 2003), or conjugate gradient method (Fu et al, 2004;Li et al, 2005). At each iteration step during optimization, sensitivities of the objective function with respect to various decaps are obtained by running circuit simulations on the adjoint network followed by time-domain convolution (Li et al, 2005;Su et al, 2003). Because both simulation and convolution are time-consuming operations, the overall runtime is high and suffers from the scalability problem for large P/G networks.…”

“…Because of the reliance on special P/G structures, the applicability of this technique to large P/G networks is limited and the reduction ratio is not high in general. (Li et al, 2005) employed a divide-and-conquer approach that partitioned a P/G network into a number of sub-circuits so that decap budgeting can be solved efficiently for each sub-circuit. But to consider the inter-dependence between different sub-circuits, an artificial boundary condition has to be imposed, hence the accuracy of the solution cannot be guaranteed.…”

Decoupling capacitance allocation for timing with statistical noise model and timing analysis

“…However, most of conventional design techniques aim to reduce power supply noise, and not to directly minimize the impact on timing. In the past, efficient allocation of decaps has been studied [1], [2], [3]. References [1], [2] proposed methods to reduce voltage drop with a limited amount of decap.…”

“…In Refs. [1], [2], an allowable voltage drop is first specified, and the integration of the excessive drop with respect to time is minimized within the given decap budget. However, the suppression of voltage drop does not necessarily improve timing as reported in Ref.…”