2021
DOI: 10.1007/s11042-021-10820-4
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Performance analysis of DSDV and OLSR wireless sensor network routing protocols using FPGA hardware and machine learning

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Cited by 39 publications
(13 citation statements)
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“…The Xilinx device summary for ANN-8, ANN-16, ANN-24, ANN-32, ANN-40 ANN-48, ANN-66, and ANN-64 is given in Table 5 . The target device is Virtex-5 FPGA with device xc5vlx20t-2-ff323 used for simulation and synthesis [ 24 ]. Figure 10 presents the hardware utilization curve for ANN-8 to ANN-64 hardware chips.…”
Section: Resultsmentioning
confidence: 99%
“…The Xilinx device summary for ANN-8, ANN-16, ANN-24, ANN-32, ANN-40 ANN-48, ANN-66, and ANN-64 is given in Table 5 . The target device is Virtex-5 FPGA with device xc5vlx20t-2-ff323 used for simulation and synthesis [ 24 ]. Figure 10 presents the hardware utilization curve for ANN-8 to ANN-64 hardware chips.…”
Section: Resultsmentioning
confidence: 99%
“…The significance of the MATLAB simulation time is that the particular algorithm can predict the estimated delay when the algorithm will be realized in the MATLAB-HDL simulator or Simulink for tumor detection system implementation. The MATLAB simulation predicts the time complexity for the algorithm and estimates the designer to choose the machine learning model [26,40]. The performance of the algorithms is evaluated based on the performance measures such as precision, recall, F-measure, and accuracy [43].…”
Section: Resultsmentioning
confidence: 99%
“…The chip design of the AODV routing algorithm is carried out in Xilinx ISE 14.7. The steps are: design constraints, algorithm selection, modeling approach, register transfer level (RTL) analysis, function simulation and data communication with test benches FPGA synthesis, hardware parameters report analysis, and perform comparative analysis [22] based on performance indices. The waveform is functionally checked on the Xilinx integrated synthesis environment simulator (ISIM).…”
Section: Methodsmentioning
confidence: 99%