Performance driven spacing algorithms using attractive and repulsive constraints for submicron LSI's

Onozawa, Akira; Chaudhary, K.; Kuh, E.S.

doi:10.1109/43.387731

Cited by 22 publications

(6 citation statements)

References 19 publications

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“…Crosstalk results mainly from coupled capacitance between adjacent (parallel routed) interconnections. With further minimization in design, and thus further reduction of the distance between interconnections, crosstalk is becoming an important electrical constraint and it is going to be more so in the future [4], [28].…”

Section: Introductionmentioning

confidence: 99%

A parallel genetic algorithm for performance-driven VLSI routing

Lienig

1997

IEEE Trans. Evol. Computat.

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This paper presents a novel approach to solve the VLSI (very large scale integration) channel and switchbox routing problems. The approach is based on a parallel genetic algorithm (PGA) that runs on a distributed network of workstations. The algorithm optimizes both physical constraints (length of nets, number of vias) and crosstalk (delay due to coupled capacitance). The parallel approach is shown to consistently perform better than a sequential genetic algorithm when applied to these routing problems. An extensive investigation of the parameters of the algorithm yields routing results that are qualitatively better or as good as the best published results. In addition, the algorithm is able to significantly reduce the occurrence of crosstalk.

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Section: Introductionmentioning

confidence: 99%

A parallel genetic algorithm for performance-driven VLSI routing

Lienig

1997

IEEE Trans. Evol. Computat.

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“…al. 10,11 . In general each o f these strategies su ers from the fact that the routing has been speci ed in too much detail and is now v ery di cult to adjust.…”

Section: Previous Work On Cross-talk Noise Aware Routingmentioning

confidence: 99%

An efficient sequential quadratic programming formulation of optimal wire spacing for cross-talk noise avoidance routing

Morton

Dai

1999

Proceedings of the 1999 International Symposium on Physical Design

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In this paper we propose a new, and e ective, approach to cross-talk noise avoidance routing. In our new approach we attack the cross-talk noise problem immediately following topological routing, which is the point in the routing process that gives the best trade o between the ability t o detect cross-talk noise problems and the ability to correct the problems. We formulate the heart of this new approach as a convex, nonlinear, mathematical programming problem which determines an optimal set of wire spacings under cross-talk noise constraints. This new mathematical programming formulation is based on a detailed knowledge of the underlying cross-talk noise mechanisms and accounts for coupling capacitance, interconnect resistance, and aggressor net signal rise time on nets with arbitrarily complex tree topologies. Finally, b y slightly restricting this programming problem we formulate it as a linearly constrained, convex, nonlinear, mathematical program which can be quickly and e ciently solved using sequential quadratic programming.

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“…Algorithms for minimized crosstalk routing have been presented in [4], [8], [10], [11] and [22]. The solutions in [4],[8] and [22] are based on variable grid spacings to satisfy the crosstalk constraints.…”

Section: Introductionmentioning

confidence: 99%

“…The solutions in [4],[8] and [22] are based on variable grid spacings to satisfy the crosstalk constraints. However, these solutions are difficult to implement on gridded VLSI routing problems.…”

Section: Introductionmentioning

confidence: 99%

Channel and switchbox routing with minimized crosstalk. A parallel genetic algorithm approach

Lienig

Proceedings Tenth International Conference on VLSI Design

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Reduction of crosstalk between interconnections becomesan important consideration in today S VLSI design. This paper presents a novel approach to solve the VLSI channel and switchbox routing problems with the objective of satisfying crosstalk constraints for the nets. The approach is based on a parallel genetic algorithm which runs on a distributed network of workstations. All our routing results are qualitatively better or as good as the best published results. In addition, our algorithm is able to signijkantly reduce the occurrence of crosstalk.

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Performance driven spacing algorithms using attractive and repulsive constraints for submicron LSI's

Cited by 22 publications

References 19 publications

A parallel genetic algorithm for performance-driven VLSI routing

A parallel genetic algorithm for performance-driven VLSI routing

An efficient sequential quadratic programming formulation of optimal wire spacing for cross-talk noise avoidance routing

Channel and switchbox routing with minimized crosstalk. A parallel genetic algorithm approach

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