2016
DOI: 10.1109/ted.2015.2503141
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Performance Enhancement of Novel InAs/Si Hetero Double-Gate Tunnel FET Using Gaussian Doping

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Cited by 141 publications
(53 citation statements)
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“…It is the time taken by the charge carriers (electrons) to cross the channel. Analytical expression for calculating the transit time as expressed in [20] is-…”
Section: Transit Timementioning
confidence: 99%
“…It is the time taken by the charge carriers (electrons) to cross the channel. Analytical expression for calculating the transit time as expressed in [20] is-…”
Section: Transit Timementioning
confidence: 99%
“…Different architectures of TFETs have been proposed till date to improve their performance and increase the on currents. [22,23], nanowire TFET [24,25], heterojunction TFET [26,27], III-V TFET [28], triple material gate TFET [29,30], cylindrical TFET [31] and SOI TFET [32] are some of the widely used structures.…”
Section: Introductionmentioning
confidence: 99%
“…Recently, numerous structural and material designs of TFETs have been proposed with an objective to achieve improvement in subthreshold swing (SS) and off current. A few of them are bandgapengineered TFETs [3], graphene nanoribbon TFETs [4], gate-engineered TFET [5], and strained silicon-germanium TFETs [6]. Double-gate TFET [7], dual-material gate TFET [8], hetero-gate dielectric TFET [9], and heterojunction TFETs [10] have also been investigated for improved electrical parameters of TFET.…”
Section: Introductionmentioning
confidence: 99%