Performance of Deep-Depletion Buried-Channel $n$-MOSFETs for CMOS Image Sensors

Abstract

Buried-channel (BC) MOSFETs are known to have better noise performance than their surface-channel (SC) counterparts when used as a source follower in modern chargecoupled devices (CCDs). CMOS image sensors are finding increasing applications and compete with CCDs in highperformance imaging, but BC transistors are rarely used in CMOS. As a part of the development of charge storage using CCDs in CMOS, we designed and manufactured deep-depletion BC n-type MOSFETs in 0.18-µm CMOS image sensor process. The BC transistors are designed in a way similar to the source followers in a typical BC CCD, and feature deep n-channel implant and threshold voltage exceeding −2.5 V. In this paper, we report the results from their characterization and compare them with normal enhancement mode and "zero-threshold" SC devices. In addition to the detailed current-voltage and noise measurements, 2-D semiconductor device simulation results are presented to illustrate and understand the different conditions affecting the channel conduction and the noise performance of the BC transistors. We show that under optimal bias conditions the noise performance of the BC transistors can be superior despite their lower gain as in-pixel source followers.Index Terms-Buried-channel (BC) MOSFET, CMOS image sensors, semiconductor device noise.

1/${f}^{\gamma}$ Low Frequency Noise Model for Buried Channel MOSFET

“…The substrate resistivity was around 15-25 Ohm*cm. In order to comply with the high performance wide dynamic range CIS design methodology [6], the n-type BC MOSFETs were fabricated with 15 nm thick gate oxide rated at 5 V and used as in-pixel source follower. To minimize the noise impact from Shallow Trench Isolation (STI), the active field was formed by the LOCOS process.…”

“…Using a similar idea to [6], the doping profile is designed as a concave shape to optimize the gate transconductance (g m ). When the gate voltage is decreased, a depletion region beneath the interface is formed to separate the conducting channel from the silicon surface.…”

“…For MOSFETs with a small channel area, it is possible to observe the Random Telegram Signal (RTS) noise, which is a particular type of LFN due to only a single dominant oxide trap [5]. Buried Channel (BC) MOSFETs are widely known to have lower LFN than normal Surface Channel (SC) MOSFETs due to the reduced interaction between channel carriers and the silicon-oxide interface [6]. With a negative gate-to-source voltage, the conducting channel is buried deeply from the interface by a vertical suppressing electrical field.…”

“…But only simulation was presented. The fabrication of BC MOSFETs in a CIS compatible process was reported in [6], and the noise characterization was performed on a single BC MOSFET with small channel. However, the results are not statistically representative since MOSFETs with small channel area have large variation in noise [10].…”

Frequency jumps in single chip microwave LC oscillators

“…8,9,15,21 Nowadays, the interest in the investigation of the RTS (and of related phenomena such as the bias temperature instability 10 ) is justified by its growing impact on the behavior of many electronic devices as their size is downscaled. 10 For example, the performance of image sensors 22,23 and memories 24,25 is highly influenced by these phenomena.…”