Performance of the NVIDIA Jetson TK1 in HPC

Ukidave, Yash; Kaeli, David; Gupta, Umesh C.; Keville, Kurt

doi:10.1109/cluster.2015.147

Cited by 23 publications

(4 citation statements)

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“…Li et al [14] proposed an embedded framework for real-time top-view people counting. They used the Kinect camera and the Jetson TK1 board [46] to detect human heads using the water filling technique [40]. Their approach also uses the nearest neighbor association method for tracking.…”

Section: Detection-based Methodsmentioning

confidence: 99%

Benchmark data and method for real-time people counting in cluttered scenes using depth sensors

Sun

Akhtar

Song

et al. 2018

Preprint

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Vision-based automatic counting of people has widespread applications in intelligent transportation systems, security, and logistics. However, there is currently no large-scale public dataset for benchmarking approaches on this problem. This work fills this gap by introducing the first real-world RGB-D People Counting DataSet (PCDS) containing over 4, 500 videos recorded at the entrance doors of buses in normal and cluttered conditions. It also proposes an efficient method for counting people in real-world cluttered scenes related to public transportations using depth videos. The proposed method computes a point cloud from the depth video frame and re-projects it onto the ground plane to normalize the depth information. The resulting depth image is analyzed for identifying potential human heads. The human head proposals are meticulously refined using a 3D human model. The proposals in each frame of the continuous video stream are tracked to trace their trajectories. The trajectories are again refined to ascertain reliable counting. People are eventually counted by accumulating the head trajectories leaving the scene. To enable effective head and trajectory identification, we also propose two different compound features. A thorough evaluation on PCDS demonstrates that our technique is able to count people in cluttered scenes with high accuracy at 45 fps on a 1.7 GHz processor, and hence it can be deployed for effective real-time people counting for intelligent transportation systems.

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Section: Detection-based Methodsmentioning

confidence: 99%

Benchmark data and method for real-time people counting in cluttered scenes using depth sensors

Sun

Akhtar

Song

et al. 2018

Preprint

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show abstract

“…Various attempts to take advantage of mobile technology for increasing energy efficiency of HPC systems have also been taken in the recent past. The closest to our work are the EU Mont-Blanc project [16,17] and the COSA project [18,19], but several other examples can be found in the literature [20][21][22][23].…”

Section: Introduction and Related Workmentioning

confidence: 93%

Performance and Power Analysis of HPC Workloads on Heterogeneous Multi-Node Clusters

Mantovani

Calore

2018

JLPEA

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Performance analysis tools allow application developers to identify and characterize the inefficiencies that cause performance degradation in their codes, allowing for application optimizations. Due to the increasing interest in the High Performance Computing (HPC) community towards energy-efficiency issues, it is of paramount importance to be able to correlate performance and power figures within the same profiling and analysis tools. For this reason, we present a performance and energy-efficiency study aimed at demonstrating how a single tool can be used to collect most of the relevant metrics. In particular, we show how the same analysis techniques can be applicable on different architectures, analyzing the same HPC application on a high-end and a low-power cluster. The former cluster embeds Intel Haswell CPUs and NVIDIA K80 GPUs, while the latter is made up of NVIDIA Jetson TX1 boards, each hosting an Arm Cortex-A57 CPU and an NVIDIA Tegra X1 Maxwell GPU.

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“…Finally, Ukidave et al 15 evaluate UM performance on Jetson TK1 boards by co‐executing pairs of applications from the Rodinia benchmark on the Tegra iGPU and externally connected Tesla K40 dGPU. Experiments are performed to see how much execution time along with energy and power consumption is improved, when compared to executing these pairs of applications on the dGPU alone.…”

Section: Related Workmentioning

confidence: 99%

Comparing unified, pinned, and host/device memory allocations for memory‐intensive workloads on Tegra SoC

Choi

You

Kim

et al. 2020

Concurrency and Computation

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Summary Edge computing focuses on processing near the source of the data. Edge computing devices using the Tegra SoC architecture provide a physically distinct GPU memory architecture. In order to take advantage of this architecture, different modes of memory allocation need to be considered. Different GPU memory allocation techniques yield different results in memory usage and execution times of identical applications on Tegra devices. In this article, we implement several GPU application benchmarks, including our custom CFD code with unified, pinned, and normal host/device memory allocation modes. We evaluate and compare the memory usage and execution time of such workloads on edge computing Tegra system‐on‐chips (SoC) equipped with integrated GPUs using a shared memory architecture, and non‐SoC machines with discrete GPUs equipped with distinct VRAM. We discover that utilizing normal memory allocation methods on SoCs actually use double the required memory because of unnecessary device memory copies, despite being physically shared with host memory. We show that GPU application memory usage can be reduced up to 50%, and that even performance improvements can occur just by replacing normal memory allocation and memory copy methods with managed unified memory or pinned memory allocation.

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Performance of the NVIDIA Jetson TK1 in HPC

Cited by 23 publications

References 0 publications

Benchmark data and method for real-time people counting in cluttered scenes using depth sensors

Benchmark data and method for real-time people counting in cluttered scenes using depth sensors

Performance and Power Analysis of HPC Workloads on Heterogeneous Multi-Node Clusters

Comparing unified, pinned, and host/device memory allocations for memory‐intensive workloads on Tegra SoC

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