Perhydropolysilazane Charge‐Trap Layer in Solution‐Processed Organic and Oxide Memory Thin‐Film Transistors

Abstract

The charge trapping property of spin‐coated perhydropolysilazane (PHPS) layers for solution‐processed organic and oxide thin film memory transistors is demonstrated. The nitrogen content within the PHPS layer is decreased by increasing the annealing temperatures from room temperature to 450 °C. The PHPS layer added to the SiO2 gate insulator in the charge trap memories (CTMs) shows good memory functionalities which are electrically programmable, and is erased either electrically or optically depending on the semiconductor used. The stored or erased charges in the p‐type semiconductor‐based CTM result in relatively large threshold voltage shifts (∆VTH > 60 V) and large memory on‐ and off‐current ratio (IM,ON/IM,OFF > 103) with the respective memory output current extrapolated to 108 s. The n‐type CTM shows ∆VTH ≈ 20 V, IM,ON/IM,OFF of 0.5 × 103 and is extrapolated to 1015 s. It is concluded that the origin of the charge‐traps in both the p‐type and n‐type CTMs mainly originates from the PHPS charge trap layer (CTL) and greatly occurs in highly concentrated nitrogen PHPS layers. There is a high possibility of using the PHPS CTL in a wide variety of cost‐effective CTMs even with high temperature processed semiconductors.

Solution-processed zirconium acetylacetonate charge-trap layer for multi-bit nonvolatile thin-film memory transistors

“…The Ox-CTM RT showed the highest electron trap density and the positive shift of the V TH decreases as the T A increases signifying the reduction of the electron traps. This is similar to the earlier report on the reduction of electron traps in the Ox-CTM using the solution-processed Si 3 N 4 -based inorganic CTL [ 14 ]. The electron traps within the Ox-CTM RT are attributed to the residual carbon within the ZAA dried at RT since partial decomposition of the carbon occurs below 500°C.…”

“…where and are the width and length of the transistor, is the capacitance of the gate dielectric and is the gate-to-source voltage [ 37 ]. The mobility of the PD-TFT and that of the PD-CTM RT were calculated to be 0.15 cm 2 V −1 s −1 and 0.04 cm 2 V −1 s −1 respectively and this reduction is better than other reported CTMs with similar structural configuration [ 14 ]. Furthermore, to evaluate the bias-stress effect on the PD-CTM RT , the transfer characteristic curves were measured with high negative gate-bias voltage of −90 V applied to the PD-CTM RT for 3.2 s, 6.4 s and 12.8 s (supplementary Figure S3) and they all showed the same mobility of 0.05 cm 2 V −1 s −1 and slight negative shift of the V TH as the stress time increased.…”

“…This explains the gradual increase of the dielectric constant of the ZAA films with increasing T A . It can finally be deduced from the dielectric data results that the RT-dried ZAA layer has a relatively lower dielectric constant although higher than that of the SiO 2 (3.9) and similar to SiON x (~7) [ 14 ] which are conventionally used as gate dielectric and charge-trap materials respectively.…”

“…In order to ascertain the charge trapping effect of the ZAA layer, the electrical properties and memory functionalities were examined by first fabricating a reference thin-film transistor (TFT) with recently used high performance p -type polymer semiconductor (PDPP4T) [ 14 , 29 ]. The transfer characteristic curves of the initial state (no gate-bias) and the transfer curves after programming and erasing were measured to confirm the charge trap effect of the p -type TFT.…”

“…Instead of the traditional Si semiconductor-substrate or relatively expensive high-vacuum deposited semiconductors, the solution-processed organic and oxide semiconductors have widely been embraced for the production of cost-effective futuristic electronic devices including CTMs due to their low-cost solution processability and other viable processing flexibilities. We previously reported CTM with solution-processed semiconductor and solution-processed Si 3 N 4 -based inorganic CTL with good memory functionality and good thermal property [ 14 ], however the organic-based CTL with high -k dielectric will be much preferred.…”