Perspective—Performance Assessment of TFETs for Low Power Applications: Challenges and Prospects

Abstract

Tunnel Field Effect Transistors (TFETs) are potential semiconductor devices which offer low off current, sub-60 mV dec −1 subthreshold swing and significantly alleviated short channel effects, as compared to downscaled MOSFETs. However, the low on current in TFETs has been a major challenge which has propelled the direction of research towards proposals of novel geometries. The emergence of a number of geometries and their detailed optimizations creates a number of challenges for selecting the best one among them. This work presents the different challenges and offers an effective solution through the discussion involving a figure of merit.

HF-QSRAM: Half-Select Free Quaternary SRAM Design with Required Peripheral Circuits for IoT/IoVT Applications

“…Nonetheless, most of the designs in the literature are working on various technologies, arrays, and cells to decrease the power consumption of SRAM chips. [22][23][24][25][26][27] In the internet of things (IoT) devices issue of memory and most of all during sleep power consumption of hardware memories is crucial. 28 Solutions such as software-managed on-chip memory, which is also known as scratchpad memories (SPMs) have been presented to compensate for this issue.…”