PHIDEO: High-level synthesis for high throughput applications

Abstract

Abstract.This paper describes a new approach to high-level synthesis for high throughput applications. Such applications are typically found in real-time video systems such as HDTV. The method is capable of dealing with hierarchical flow graphs containing loops with manifest boundaries and linear index expressions. The algorithm is based on the model of periodic operations which allows optimizations across loop boundaries. Processing units and storage units are minimized simultaneously. The algorithm is implemented in the PHIDEO system. The major parts of this system are the processing unit synthesis, the scheduler and the memory synthesis including address generation.

Application-specific clustered VLIW datapaths: early exploration on a parameterized design space

“…It must be noted that the definition of special-purpose functional units is of primary importance in certain design methodologies, especially ones associated with designing high performance hardware accelerators, such as [4], [22], and [23]. In contrast, our target architecture style can be classified as "custom VLIW datapath" (see also Faraboschi et al [9]) which targets processors that are supposed to execute not only the critical kernels, but the entire application or a significant part of it.…”

Mapping array communication onto FIFO communication - towards an implementation

“…An example of array-based communication can be found in the PHIDEO technology [5] [8]. PHIDEO is a high-level hardware synthesis design methodology, and supports the complete design flow starting from a high-level specification all the way down to layout 1 .…”

“…PHIDEO's model of computation is based on exchanging multi-dimensional arrays between processing units; the implementation is based on a single controller which synchronizes all communication. The motivation for introducing multi-dimensional arrays is that in most Digital Signal Processing (DSP) applications, (nested) loops play an important role [5]. They originate from the repetitive nature of DSP applications, and the way they are specified.…”

Heterogeneous multi-processor for the management of real-time video and graphics streams

“…Therefore, high-level synthesis tools like Phideo [5] can be used to design the processor. The shell adapts the periodic model of Phideo to the rest of the system which is much more dynamic.…”

“…Design entry is performed at RTL level and at behavioral level. An in-house behavioral synthesis tool [5] specialized in stream processing functions is used for the video scaling and enhancement functions. The behavioral synthesis tool produces RTL code, by deriving a data path and schedule.…”