Computer-science-oriented and neuroscience-oriented are two general approaches to developing artificial general intelligence (AGI). In this study, a silicon neuron transistor is developed using the neuroscience approach for AGI applications. Neuronal behavior ("weighted sum and threshold" function) is based on the complementary metal-oxidesemiconductor (CMOS) negative differential resistance (NDR) theory. The neuron transistor is implemented by the UMC 180-nm commercial standard CMOS process, which is beneficial to implement an entire neural network or integrate with other CMOS circuits on the same chip. The neuron transistor is composed of three inputs Vg1, Vg2, and Vg3 and one control terminal Vcon, Vb(load), and Vb(driver). The width of each input is 1.8 μm, and the inputs have 1, 2, and 4 fingers, that is, the weight ratio is 1:2:4. Vb(load) and Vb(driver) enable a neuron transistor to function more closely resembles a real biological neuron, with improved sensitivity and less complicacy compared to a traditional artificial neural network. The neuron MOS transistor was measured at the maximum frequency of 10 kHz. It had extremely low power consumption of <10-4 μW and a miniscule footprint 30 × 15 μm 2. As the process feature size decreases, the chip's operating frequency will increase by one order of magnitude, and its power consumption and footprint will decrease.