Physical IC debug – backside approach and nanoscale challenge

Abstract

Abstract. Physical analysis for IC functionality in submicron technologies requires access through chip backside. Based upon typical global backside preparation with 50-100 µm moderate silicon thickness remaining, a state of the art of the analysis techniques available for this purpose is presented and evaluated for functional analysis and layout pattern resolution potential. A circuit edit technique valid for nano technology ICs, is also presented that is based upon the formation of local trenches using the bottom of Shallow Trench Isolation (STI) as endpoint for Focused Ion Beam (FIB) milling. As a derivative from this process, a locally ultra thin silicon device can be processed, creating a back surface as work bench for breakthrough applications of nanoscale analysis techniques to a fully functional circuit through chip backside. Several applications demonstrate the power and potential of this new approach.

Improving the Physical Security of Microchips against Side-Channel Attacks

“…Backside imaging can be considered an easy way of almost directly accessing the transistor layer with further scanning possibilities realized by photon-emission microscopy, laser voltage probing, laser voltage imaging, IR imaging, thermal emission imaging, etc., [22][23][24][25][26].…”

“…These pads, whatever they are made of, have to be removed. Consequently, the silicon substrate has to be thinned down according to the chosen scanning technique (100 µm -50 nm) [22][23][24][25][26]. After preparation as stated above, backside observations can take place.…”

SAT-based reverse engineering of gate-level schematics using fault injection and probing

“…With the growing number of metal layers on the frontside, backside probing may seem more promising as it keeps the metal layers intact and preserves the proper functionality of the circuit [11]. Preparing the chip for frontside probing requires decapping the chip by removing epoxy and blocking metal layers to access the internal signals or transistors while backside probing only requires simple thinning and polishing from the back [22], [3]. The ability to probe node values enhances the attacker's observability.…”