Physical mechanisms of endurance degradation in TMO-RRAM

Chen, B.; Lu, Yang; Gao, Bin; Fu, Yihan; Zhang, F.F.; Huang, Peng; Chen, Y.S.; Liu, L.F.; Liu, X.Y.; Kang, Jinfeng; Wang, Y.Y.; Fang, Zheng; Yu, Hao; Li, X.; Wang, X.P.; Singh, Navab; Lo, G. Q.; Kwong, Dim‐Lee

doi:10.1109/iedm.2011.6131539

Cited by 133 publications

(81 citation statements)

References 6 publications

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“…Generally endurance phenomenon depends on different operation factors such as the environment temperature, device switching speed and also the material characteristics. Regarding this, three types of endurance failure behavior are reported in RRAM devices [9]. In the first mechanism the HRS resistance tends to decrease while the LRS resistance increases during cycles.…”

Section: B Endurancementioning

confidence: 99%

“…Fig.1 depicts this degradation mechanism and defines the final failure state of the device as the point that the HRS to LRS resistance ratio decrease reaches an arbitrary given ratio K. The second and third endurance mechanisms are due to the abrupt or gradual (respectively) drop of HRS value during the cycles and getting stuck at LRS value [9]. In this work, we focus on the first mechanism as it is considered the worst case [9,10]. Therefore, we analyze its impact in the reliability of a memristive crossbar memory.…”

Section: B Endurancementioning

confidence: 99%

“…In order to estimate the probability distribution of a memristive crossbar lifetime, we first evaluate the probability distribution of a single memristor's lifetime, starting from cycle zero and assuming a degrading phenomenon due to endurance as shown in [9,10]. We can estimate the lifetime of a memristor (τ, a random variable) by assuming a linear approximation for the degradation slopes of LRS and HRS with the number of cycles following the concept shown in Fig.…”

Section: Crossbar Lifetime Analysismentioning

confidence: 99%

“…In order to investigate the reliability of the read process in the memristive crossbar we analyze the probability of the error using Matlab simulation while performing the reading operation. Let's consider in this work LRS and HRS resistance random values defined by normal distributions, with characteristics obtained from experimental results in the literature [9,10]…”

Section: Uncertainty Impact In Memristor Read Cyclementioning

confidence: 99%

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Statistical lifetime analysis of memristive crossbar matrix

Pouyan¹,

Amat²,

Rubio³

2015

2015 10th International Conference on Design &Amp; Technology of Integrated Systems in Nanoscale Era (DTIS)

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Abstract-Memristors are considered one of the most favorable emerging device alternatives for future memory technologies. They are attracting great attention recently, due to their high scalability and compatibility with CMOS fabrication process. Alongside their benefits, they also face reliability concerns (e.g. manufacturing variability). In this sense our work analyzes key sources of uncertainties in the operation of the memristive memory and we present an analytic approach to predict the expected lifetime distribution of a memristive crossbar.

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Section: B Endurancementioning

confidence: 99%

Section: B Endurancementioning

confidence: 99%

Section: Crossbar Lifetime Analysismentioning

confidence: 99%

Section: Uncertainty Impact In Memristor Read Cyclementioning

confidence: 99%

See 2 more Smart Citations

Statistical lifetime analysis of memristive crossbar matrix

Pouyan¹,

Amat²,

Rubio³

2015

2015 10th International Conference on Design &Amp; Technology of Integrated Systems in Nanoscale Era (DTIS)

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“…ENDURANCE MODEL Fig. 5 shows the effect of aging after a high number of operational cycles, phenomenon that causes a limitation in endurance [5]. This aging model indicates a gradual reduction of the HRS (and IRS) levels with cycling operations.…”

Section: Cycle-to Cycle Variabilitymentioning

confidence: 99%

Reliability issues in RRAM ternary memories affected by variability and aging mechanisms

Rubio

Escudero

Pouyan

2017

2017 IEEE 23rd International Symposium on on-Line Testing and Robust System Design (IOLTS)

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Abstract-Resistive switching Random Access Memories (RRAM) are being considered as a promising alternative for conventional memories mainly due to their high speed, scalability, CMOS compatibility, Non-Volatile behavior (NVM), and consequent orientation to low power consumption. Advances in the RRAM technology as well as enhancement of the control of the cells are opening the use of these devices for multi-valued logic. But the cycle-to-cycle variability and the still reduced endurance are becoming serious limitations. This paper analyzes the impact of both mechanisms on 1T1R cells and suggests potential adaptive mechanisms to enlarge its lifetime.

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