Physical origin of dipole formation at high-k/SiO2 interface in metal-oxide-semiconductor device with high-k/metal gate structure

Abstract

A physical model on dipole formation at high-k/SiO2 interface is proposed to study possible mechanism of flatband voltage (VFB) shift in metal-oxide-semiconductor device with high-k/metal gate structure. Dielectric contact induced gap states (DCIGS) on high-k or SiO2 side induced by high-k and SiO2 contact are assigned to dominant origin of dipole formation. DCIGS induced interface dipole is considered to cause VFB shift through charge transfer effect. Based on the proposed model, directions of dipoles at several high-k/SiO2 interfaces are predicted, and magnitudes of dipoles are approximately calculated. Both directions and magnitudes are in agreement with the reported results.

A High-Frequency Transconductance Method for Characterization of High- $\kappa$ Border Traps in III-V MOSFETs

“…. It is possible that the interface between the Al 2 O 3 and HfO 2 in the gate dielectric, located at about 0.5 nm depth, contributes to the increased N bt (x m ) [14]. And, it could even be argued that this is why a peak is observed.…”

Experimental and theoretical investigation of the effect of SiO2 content in gate dielectrics on work function shift induced by nanoscale capping layers

“…In addition, several models have already been proposed to explain the capping layer effect on flatband voltage (V FB ). [8][9][10][11][12] However, one area that has not been systematically investigated is the effect of the composition of the dielectric below the capping layer on the magnitude of the flatband voltage shift. In this article, we have investigated four different types of capping layers deposited on dielectrics with varying compositions.…”

Comprehensive Demonstration and Physical Origin of HfO2 Gate Stacks: Band Alignment, VFB Shift and Fermi Level Pinning

“…These charges induce voltage drop on the contact and the relative shift of the Fermi level with respect to the bulk energy band so that the Fermi levels of the metal (semiconductor) and semiconductor (semiconductor) are identical. For the metal/high-k/SiO 2 /Si structure, there are the DCIGS at the metal/high-k and highk/SiO 2 interfaces due to the mismatch of materials (12). The charges transfer among the metal, Si substrate, the DCIGS at the metal/high-k and high-k/SiO 2 interfaces, resulting in potential drop through the entire stack.…”

“…High-k dielectric materials and SiO 2 can be thought as semiconductors with wide band gap. Thus the band alignments of all these contacts are determined by the metal/semiconductor or semiconductor/semiconductor contacts interpreted by the model based on gap states (12,(19)(20)(21)(22)(23)(24). Band alignment for the metal (semiconductor)/semiconductor (semiconductor) contact is established when the Fermi levels are consistent after charge transfer between the metal (semiconductor) and the semiconductor (semiconductor).…”

“…In order to demonstrate the physical origin of the effect of metal/high-k interface on V FB , band alignment of metal/high-k interface is essential and has been widely explored by internal photoemission (IPE) and x-ray photoelectron spectroscopy (XPS) (7)(8). In addition, electrical dipole at the high-k/SiO 2 interface is reported to play an important role and possible formation mechanisms have been proposed (9)(10)(11)(12)(13)(14)(15). Investigation of band alignment of high-k/SiO 2 /Si stack is necessary to provide a physical understanding of the interfacial dipole formation.…”