Piecewise Affine Control Design for Power Factor Correction Rectifiers

Tahami, Farzad; Poshtkouhi, Shahab; Ahmadian, Hamid

doi:10.6113/jpe.2011.11.3.327

Cited by 9 publications

(5 citation statements)

References 24 publications

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“…5. In order to verify the accuracy of the derived average model in section II, both the switching model and the average model in (14) are simulated simultaneously. In addition, the same voltage and current controllers designed in section III are applied to both of the models.…”

Section: Simulation Resultsmentioning

confidence: 99%

“…In [11]- [13], duty feed-forward strategies have been proposed to improve the response and stability of boost PFC rectifiers by compensating the admittance component of the entire control system. Reference [14] proposes a multiple controller technique to improve the total harmonic distortion (THD) by considering multiple control models according to the magnitude of the input voltage. On the other hand, many studies about the digital control of PFC converters have been conducted because their interface is flexible in digital control system [15]- [18].…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Digital Control Strategy for Single-phase Voltage-Doubler Boost Rectifiers

Cho¹,

Mok²,

Ji³

et al. 2012

Journal of Power Electronics

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In this paper, a digital controller design procedure is presented for single-phase voltage-doubler boost rectifiers (VDBR). The model derivation of the single-phase VDBR is performed in the s-domain. After that the simplified equivalent z-domain models are derived. These z-domain models are utilized to design the input current and the output dc-link voltage controllers. For the controller design in the z-domain, the traditional K-factor method is modified by considering the nature of the digital controller. The frequency pre-warping and anti-windup techniques are adapted for the controller design. By using the proposed method, the phase margin and the control bandwidth are accurately achieved as required by controller designers in a practical frequency range. The proposed method is applied to a 2.5 kVA single-phase VDBR for Uninterruptible Power Supply (UPS) applications. From the simulation and the experimental results, the effectiveness of the proposed design method has been verified.

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Section: Simulation Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Digital Control Strategy for Single-phase Voltage-Doubler Boost Rectifiers

Cho¹,

Mok²,

Ji³

et al. 2012

Journal of Power Electronics

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show abstract

“…Piecewise affine (PWA) systems is a well-known and wide-applicable class of hybrid. By employing the PWA model, which consists of linear (or, rather, affine) subsystems, the stability analysis, and control design problems can be reduced to some linear matrix inequality (LMI) problems [22][23][24][25][26][27]. Based on the inherent switched linear dynamics of the SRC, the authors have already proposed hybrid control of the SRC operating above/below the resonance in continuous conduction mode (CCM) [28][29][30].…”

Section: Introductionmentioning

confidence: 99%

Voltage Regulation of DC-DC Series Resonant Converter Operating in Discontinuous Conduction Mode: The Hybrid Control Approach

Afshang

Tahami

2019

IJE

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A B S T R A C TDynamic modeling and control of dc-dc series resonant converter (SRC) especially when operating in discontinuous conduction mode (DCM) is still a challenge in power electronics. Due to semiconductors switching, SRC is naturally represented as a switched linear system, a class of hybrid systems. Nevertheless, the hybrid nature of the SRC is commonly neglected and it is modeled as a purely continuous dynamics based on the sinusoidal approximation and averaging. However, an SRC may be purposely designed to operate in DCM so the sinusoidal approximation is no longer acceptable. Therefore, it is essential to analyze the stability using a more sophisticated model. This paper presents a novel hybrid control strategy for the output voltage regulation of the SRC operating in DCM. Neither sinusoidal nor averaging is used. The stability of the closed-loop system is systematically fulfilled by satisfying some linear matrix inequalities. The proposed hybrid control approach has simple hardware implementation which does not require fast sampling of the resonant tank waveforms and external voltage-controlled oscillator. A prototype of the SRC is constructed and the hybrid controller is realized on a TMS320F2812 DSP core. The effectiveness of the proposed method is verified by simulation and experimental results.

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“…Take I SN1 /I SN2 =3/4, by setting the bias circuit properly (discussed in the following section), V T =26mV and η=1.4 for the NMOS transistor. A [22]. Two inverters (M 7 , M 8 and M 9 , M 10 ) are used to increase the output swing and to improve the driving capability of COMP 1 .…”

Section: B Design Of the Unbalanced-biased Comparatormentioning

confidence: 99%

An Active Voltage Doubling Rectifier with Unbalanced-Biased Comparators for Piezoelectric Energy Harvesters

Liu¹,

Mu²,

Yuan³

et al. 2016

Journal of Power Electronics

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For wearable health monitoring systems, a fundamental problem is the limited space for storing energy, which can be translated into a short operational life. In this paper, a highly efficient active voltage doubling rectifier with a wide input range for micro-piezoelectric energy harvesting systems is proposed. To obtain a higher output voltage, the Dickson charge pump topology is chosen in this design. By replacing the passive diodes with unbalanced-biased comparator-controlled active counterparts, the proposed rectifier minimizes the voltage losses along the conduction path and solves the reverse leakage problem caused by conventional comparator-controlled active diodes. To improve the rectifier input voltage sensitivity and decrease the minimum operational input voltage, two low power common-gate comparators are introduced in the proposed design. To keep the comparator from oscillating, a positive feedback loop formed by the capacitor C is added to it. Based on the SMIC 0.18-μm standard CMOS process, the proposed rectifier is simulated and implemented. The area of the whole chip is 0.91×0.97 mm 2 , while the rectifier core occupies only 13% of this area. The measured results show that the proposed rectifier can operate properly with input amplitudes ranging from 0.2 to 1.0V and with frequencies ranging from 20 to 3000 Hz. The proposed rectifier can achieve a 92.5% power conversion efficiency (PCE) with input amplitudes equal to 0.6 V at 200 Hz. The voltage conversion efficiency (VCE) is around 93% for input amplitudes greater than 0.3 V and load resistances larger than 20kΩ.

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Piecewise Affine Control Design for Power Factor Correction Rectifiers

Cited by 9 publications

References 24 publications

Digital Control Strategy for Single-phase Voltage-Doubler Boost Rectifiers

Digital Control Strategy for Single-phase Voltage-Doubler Boost Rectifiers

Voltage Regulation of DC-DC Series Resonant Converter Operating in Discontinuous Conduction Mode: The Hybrid Control Approach

An Active Voltage Doubling Rectifier with Unbalanced-Biased Comparators for Piezoelectric Energy Harvesters

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