2007 18th European Conference on Circuit Theory and Design 2007
DOI: 10.1109/ecctd.2007.4529688
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Piecewise linear circuits operating on first-order multi-level and second-order binary sigma-delta modulated signals

Abstract: This paper describes piecewise linear circuits operating directly on first-order multi-level and second-order binary sigma-delta modulated signals. The sigma-delta modulated signal sequences contain subsequences which reflect whether the inputs to sigma-delta modulators are positive or negative. We build circuits performing absolute operation with detectors of the subsequences. Using the absolute circuits, we build various piecewise linear circuits, such as Min/Max circuits. These piecewise linear circuits can… Show more

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Cited by 6 publications
(5 citation statements)
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“…When the negative feedback is decreased by , as shown in Fig. 7(b), the state equation is modified from (20) to the following equation: (27) Substituting and into (27), we obtain adder operation in the -domain as (28) When…”
Section: A Using the Digital Sd Modulators For Addersmentioning
confidence: 99%
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“…When the negative feedback is decreased by , as shown in Fig. 7(b), the state equation is modified from (20) to the following equation: (27) Substituting and into (27), we obtain adder operation in the -domain as (28) When…”
Section: A Using the Digital Sd Modulators For Addersmentioning
confidence: 99%
“…Soon after SD modulation-based analog-to-digital and digital-to-analog converters became popular, signal processing circuits whose inputs, outputs, and/or internal signals are SD modulated have been reported, for example, four arithmetic operations [22]- [25], nonlinear and piecewise linear functions [26]- [28]. Building digital filters without parallel multiplier has been researched actively [29], [30].…”
Section: Introductionmentioning
confidence: 99%
“…As mentioned in section 1, SDSP (Fujisaka et al, 2002), (Fujisaka et al, 2003), (Katao et al, 2007), (Hayashi et al, 2007) is a PSP scheme employing SD modulated signal forms. Figure 7 shows the architecture of Nyquist-rate multi-bit DSP and SDSP systems.…”
Section: Sigma-delta Domain Signal Processingmentioning
confidence: 99%
“…In this section we will build arithmetic and piecewise linear (PWL) circuit modules (Fujisaka et al, 2002), (Katao et al, 2007), (Fujisaka et al, 2003), (Hayashi et al, 2007) for nanoelectronic SDSP using SET devices. The circuit modules operate on SD modulated signals and shape quantization error into the form of SD modulation noise.…”
Section: Set Circuit Modules For Sdspmentioning
confidence: 99%
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