Pipelined Parallel Finite Automata Evaluation

Accelerating Regular-Expression Matching on FPGAs with High-Level Synthesis

“…As state machines, finite au-tomata largely sidestep these challenges due to their memory-less nature. Mathematically, finite automata consist of a set of states and a transfer function F , as seen in (2.1), that accepts an input I and the current active states q to produce a set of the next active states [9]. Once an input is consumed, no historical references to it need be maintained.…”

“…The Micron Automaton Processor has been used to accelerate pattern matching [6] at throughputs of 1 Gbps. A novel FPGA approach focused on throughput enabled small NFAs of only tens of states to be dynamically loaded into device memory and processed at 40 Gbps [9] by employing a clever pipelining approach through the use of parallel prefix evaluation.…”

“…FPGAs in particular have been explored extensively as an avenue for fast regex-matching acceleration [7,9,10,5,11,12]. Their reconfigurability allows for updates to NIDS rule sets as new threats are identified, cutting costs compared to application-specific integrated circuits (ASICs).…”