Planar Growth, Integration, and Applications of Semiconducting Nanowires

Abstract

Silicon and other inorganic semiconductor nanowires (NWs) have been extensively investigated in the last two decades for constructing high‐performance nanoelectronics, sensors, and optoelectronics. For many of these applications, these tiny building blocks have to be integrated into the existing planar electronic platform, where precise location, orientation, and layout controls are indispensable. In the advent of More‐than‐Moore's era, there are also emerging demands for a programmable growth engineering of the geometry, composition, and line‐shape of NWs on planar or out‐of‐plane 3D sidewall surfaces. Here, the critical technologies established for synthesis, transferring, and assembly of NWs upon planar surface are examined; then, the recent progress of in‐plane growth of horizontal NWs directly upon crystalline or patterned substrates, constrained by using nanochannels, an epitaxial interface, or amorphous thin film precursors is discussed. Finally, the unique capabilities of planar growth of NWs in achieving precise guided growth control, programmable geometry, composition, and line‐shape engineering are reviewed, followed by their latest device applications in building high‐performance field‐effect transistors, photodetectors, stretchable electronics, and 3D stacked‐channel integration.

Tunneling between parallel one-dimensional Wigner crystals

“…Semiconductor nanowires (NWs) are exciting components to study unique one-dimensional (1D) physics such as the Coulombic strength-dependent electronic charge fractionalization 1 , quantized conductance 2 , 3 ; or the formation of a periodic charge distribution along the wires, known as a Wigner crystal, first predicted by Wigner in 1934 4 and recently observed 5 – 7 . In addition to be remarkable systems for basic research, NWs are also key building blocks in the fabrication of nanoscale electronic and optoelectronic devices 8 – 11 . Some NW-based devices that has been widely explored includes field-effect transistors (FETs) 12 – 15 , diodes 16 , nano-logic gates 17 , and nanoprocessors 18 .…”

Tunneling between parallel one-dimensional Wigner crystals

“…Semiconductor nanowires (NWs) are exciting components to study unique onedimensional (1D) physics such as the Coulombic strength-dependent electronic charge fractionalization [1], quantized conductance [2,3]; or the formation of a periodic charge distribution along the wires, known as a Wigner crystal, first predicted by E. Wigner in 1934 [4] and recently observed [5,6]. In addition to be remarkable systems for basic research, NWs are also key building blocks in the fabrication of nanoscale electronic and optoelectronic devices [7,8,9,10]. Some NW-based devices that has been widely explored includes fieldeffect transistors (FETs) [11,12,13,14], diodes [15], nano-logic gates [16], and nanoprocessors [17].…”

“…When NWs are synthesized by self-assembly, usually pillar or in-plane arrays of parallel NWs (PNWs) are produced. In such arrays, or in the integration into the existing planar electronic platforms [10], the NWs separation can be short enough to permit electron tunneling between them. Furthermore, with the continuous size reduction in the design of smaller and more powerful devices; for example in advanced sub-5 nm nodes in NW-based vertically or laterally stacked gate-all-around FETs [18,19,20], the consequences of the closeness of adjacent NWs must be thoroughly analyzed to both prevent undesirable effects and to look for new architecture strategies [21].…”

Designable Integration of Silicide Nanowire Springs as Ultra‐Compact and Stretchable Electronic Interconnections

“…In this study, we develop a growth integration strategy to batch‐manufacture orderly array of ultrathin and highly conductive Si‐Ni alloy nanowire springs (SiNi x ‐NS), with precise location control and designable elastic channel shapes. The SiNW frameworks were first formed via a step‐edge guided planar growth, based on an in‐plane solid–liquid–solid (IPSLS) mechanism established in our previous works, [ 48–57 ] followed by a low temperature alloy forming annealing that transforms the SiNWs into highly conductive Si‐Ni alloy channels, while preserving faithfully the elastic shapes. In this way, ultrathin SiNi x ‐NS channels with diameter ≈160 nm and small curvature radius <1.5 µm can be reliably fabricated, without the use of any high precision EBL or NIL technologies.…”