Plasma-activated direct bonding at room temperature to achieve the integration of single-crystalline GaAs and Si substrate

Rui, Huang; Lan, Tian; Li, Chong; Wang, Zhiyong

doi:10.1016/j.rinp.2021.105070

Cited by 7 publications

(2 citation statements)

References 45 publications

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“…To interpret these images, we first looked at other wafer bonded systems. In a direct bonded Si–Si system, C-SAM images used to determine bonded versus unbonded areas were binary, with bonded and unbonded regions being mapped to black and white color representations, respectively, in the resulting images. − This was due to well-bonded Si–Si areas having no acoustic impedance, resulting in no reflected signal, while in unbonded areas, the acoustic wave was reflected by the Si–air mismatch. However, in systems with diamond as the bottom wafer, it was found that a gray scale approach was required to interpret the images .…”

Section: Resultsmentioning

confidence: 99%

Thermal Transport and Mechanical Stress Mapping of a Compression Bonded GaN/Diamond Interface for Vertical Power Devices

Delmas,

Jarzembski,

Bahr

et al. 2024

ACS Appl. Mater. Interfaces

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Bonding diamond to the back side of gallium nitride (GaN) electronics has been shown to improve thermal management in lateral devices; however, engineering challenges remain with the bonding process and characterizing the bond quality for vertical device architectures. Here, integration of these two materials is achieved by room-temperature compression bonding centimeter-scale GaN and a diamond die via an intermetallic bonding layer of Ti/Au. Recent attempts at GaN/diamond bonding have utilized a modified surface activation bonding (SAB) method, which requires Ar fast atom bombardment immediately followed by bonding within the same tool under ultrahigh vacuum (UHV) conditions. The method presented here does not require a dedicated SAB tool yet still achieves bonding via a room-temperature metal−metal compression process. Imaging of the buried interface and the total bonding area is achieved via transmission electron microscopy (TEM) and confocal acoustic scanning microscopy (C-SAM), respectively. The thermal transport quality of the bond is extracted from spatially resolved frequency-domain thermoreflectance (FDTR) with the bonded areas boasting a thermal boundary conductance of >100 MW/m 2 •K. Additionally, Raman maps of GaN near the GaN−diamond interface reveal a low level of compressive stress, <80 MPa, in well-bonded regions. FDTR and Raman were coutilized to map these buried interfaces and revealed some poor thermally bonded areas bordered by high-stress regions, highlighting the importance of spatial sampling for a complete picture of bond quality. Overall, this work demonstrates a novel method for thermal management in vertical GaN devices that maintains low intrinsic stresses while boasting high thermal boundary conductances.

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Section: Resultsmentioning

confidence: 99%

Thermal Transport and Mechanical Stress Mapping of a Compression Bonded GaN/Diamond Interface for Vertical Power Devices

Delmas,

Jarzembski,

Bahr

et al. 2024

ACS Appl. Mater. Interfaces

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“…Other approaches, such as wafer bonding, − ELO, − and microtransfer printing are more promising. They can reproducibly deliver large-scale GaAs films of sufficient quality on foreign substrates, e.g., for applications in high-frequency amplification and optoelectronics.…”

Section: Introductionmentioning

confidence: 99%

Improved Thermal Performance of InGaAs/GaAs Nanomembrane HEMTs Transferred onto Various Substrates by Epitaxial Lift-Off

Gucmann,

Meng,

Chvála

et al. 2024

ACS Appl. Electron. Mater.

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High-frequency wireless communication in consumer, defense, and space applications heavily relies on the use of compound semiconductor amplifiers. Typically, the X to Ka wireless bands (∼8−40 GHz) are covered by GaN and GaAs-based devices, respectively, to the desired output power. GaAs-based high-electron mobility transistors (HEMTs) provide an unprecedented ultralownoise high-frequency operation even at cryogenic temperatures, critically important for the high-fidelity amplification of weak qubit states in quantum computing. Increased output power from GaAsbased devices while maintaining low self-heating is an important but challenging objective. In this study, we used an epitaxial lift-off (ELO) technique to transfer GaAs nanomembranes onto foreign substrates (sapphire, Si, and SiC) and analyzed the thermal properties of the van der Waals-bonded GaAs films by nanosecond transient thermoreflectance (TTR). Electrothermal simulation of a GaAs HEMT was used to predict the thermal performance of the transferred devices, and a significant decrease of ∼30% in the device thermal resistance (R th ) was observed when SiC and diamond substrates were used. Our results also predict that the on-state channel temperature rise can be further decreased by ∼29 to 41% if the GaAs/substrate interface is improved by increased thermal boundary conductance. Our study finds that the ELO-transferred GaAs HEMTs onto foreign highly thermally conductive substrates can significantly improve their thermal performance and allow for higher output while keeping the on-state temperature within the safe operating margin.

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A deterministic mechanic model for predicting the strain energy across the wafer bonding process coupling the effects of normal pressure and wafer geometry

Jiang

Sun

2023

International Journal of Solids and Structures

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Plasma-activated direct bonding at room temperature to achieve the integration of single-crystalline GaAs and Si substrate

Cited by 7 publications

References 45 publications

Thermal Transport and Mechanical Stress Mapping of a Compression Bonded GaN/Diamond Interface for Vertical Power Devices

Thermal Transport and Mechanical Stress Mapping of a Compression Bonded GaN/Diamond Interface for Vertical Power Devices

Improved Thermal Performance of InGaAs/GaAs Nanomembrane HEMTs Transferred onto Various Substrates by Epitaxial Lift-Off

A deterministic mechanic model for predicting the strain energy across the wafer bonding process coupling the effects of normal pressure and wafer geometry

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