PLL structures for utility connected systems

Arruda, Lícia Neto; Silva, Sidelmo M.; Filho, Braz J. Cardoso

doi:10.1109/ias.2001.955993

Cited by 314 publications

(140 citation statements)

References 4 publications

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“…As shown in Fig. 3, 2 cos t which is synchronized with electrical angle of v S , and 2 sin t which is synchronized with electrical angle of v S , are generated from the single-phase PLL circuit on the dq coordinates [4]. The load currents i L and i L are detected.…”

Section: <32> a Control Strategymentioning

confidence: 99%

A Half-bridge Inverter Based Active Power Quality Compensator for Electrified Railways

Win

Baba

Okamoto

et al. 2012

Journal of the Japan Institute of Power Electronics

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-This paper proposes a half-bridge inverter based Active Power Quality Compensator (APQC) for electrified railways. The proposed APQC is composed of three-leg structured power switching devices with two DC capacitors. The first-leg is connected to -phase feeder, and second-leg is to -phase feeder. These two legs perform a half-bridge inverter based APQC, compensating the reactive, unbalanced active and harmonic currents on two feeders. The third-leg is used to balance two DC capacitor voltages. The basic principle of the proposed half-bridge inverter based APQC is discussed in detail. The validity and excellent practicability of the proposed APQC is confirmed using PSIM software. Simulation results demonstrate that the balanced source currents with the unity power factor are obtained on the primary side of the Scott transformer in the traction substation systems, balancing two dc capacitor voltages.Keywords electrified railways, active power quality compensator, half-bridge inverter, voltage balancer, constant dc capacitor voltage control.

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Section: <32> a Control Strategymentioning

confidence: 99%

A Half-bridge Inverter Based Active Power Quality Compensator for Electrified Railways

Win

Baba

Okamoto

et al. 2012

Journal of the Japan Institute of Power Electronics

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show abstract

“…Open loop type of methods such as zero crossing detection [4] and stationary reference frame PLL [5][6][7] do not produce accurate phase information when the grid is nonideal. The closed loop approach based on synchronous reference frame (SRF) theory, popularly known as SRF-PLL, shows better phase tracking ability [1,2] under nonideal grid situations.…”

Section: Introductionmentioning

confidence: 99%

Performance evaluation of three phase SRF-PLL and MAF-SRF-PLL

Ghoshal¹

2015

Turk J Elec Eng & Comp Sci

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Abstract:Synchronous reference frame phase locked loop (SRF-PLL) is a well established technique used for maintaining synchronism of a grid connected VSI with an electric grid. Many methods of PLL are present in the literature to achieve improved performance under nonideal grid condition. These solutions are based on SRF-PLL structure along with some modification to achieve improved performance. It is observed that faster and better performance are achieved at the expense of more computations. Moving average filter (MAF) SRF-PLL structure is one such solution that consumes less resources and gives a reasonably fast response. In this work the performance of a MAF-SRF-PLL structure is evaluated in terms of unit vector distortion and settling time under various nonideal grid conditions. Its performance is compared with that of two differently designed SRF-PLLs. This evaluation gives a clear idea about possible utilizations of these PLL structures under different possible nonideal grid conditions.

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“…At present, the single-phase phase locked loop (SPLL) technique is the most widely used method to estimate grid voltage information. In addition, the SPLL method can also be adopted to monitor the performance of grid-connected power systems [1].…”

Section: Introductionmentioning

confidence: 99%

“…In [2] and [3], the orthogonal frame was created through the use of an inverse park transformation. This method is simple.…”

Section: Introductionmentioning

confidence: 99%

A New Orthogonal Signal Generator with DC Offset Rejection for Single-Phase Phase Locked Loops

Huang¹,

Dong²,

Fang³

et al. 2016

Journal of Power Electronics

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This paper presents a new orthogonal signals generator (OSG) with DC Offset rejection for implementing a phase locked loop (PLL) in single-phase grid-connected power systems. An adaptive filter (AF) based on the least mean square (LMS) algorithm is used to constitute the OSG in this study. The DC offset in the measured grid voltage signal can be significantly rejected in the developed OSG technique. This generates two pure orthogonal signals that are free from the DC offset. As a result, the DC offset rejection performance of the presented single-phase phase locked loop (SPLL) can be enhanced. A mathematical model of the developed OSG and the principle of the adaptive filter based SPLL (AF-SPLL) are presented in detail. Finally, simulation and experimental results demonstrate the feasibility of the proposed AF-SPLL.

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PLL structures for utility connected systems

Cited by 314 publications

References 4 publications

A Half-bridge Inverter Based Active Power Quality Compensator for Electrified Railways

A Half-bridge Inverter Based Active Power Quality Compensator for Electrified Railways

Performance evaluation of three phase SRF-PLL and MAF-SRF-PLL

A New Orthogonal Signal Generator with DC Offset Rejection for Single-Phase Phase Locked Loops

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