Pole-Zero Analysis of Multi-Stage Amplifiers and Low Dropout (LDO) Regulators

Abstract

The objective of this paper is to provide tutorial treatment of the steps for analyzing poles and zeros in multi-stage amplifiers and low dropout (LDO) regulators. The steps can be easily all done by hand simplification without lacking for accuracy, and divided into two methods depending on whether Miller effect exists or not. A two-stage Simple Miller Compensation (SMC) amplifier and an output capacitor-less regulator are analyzed in detail, and several multi-stage amplifiers reported in the literature are also included. To this end, Cadence Spectre simulations are performed to compare hand-computed pole/zero locations with AC analysis.