ESSDERC 2007 - 37th European Solid State Device Research Conference 2007
DOI: 10.1109/essderc.2007.4430898
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Power-cycling of DMOS-switches triggers thermo-mechanical failure mechanisms

Abstract: Figure 1. Circuit-diagram of a low-side switch driving an inductive load. The relationship between voltage, current and temperature is displayed at the right side. The high power dissipation during the switchoff causes a sharp temperature rise. Figure 2. SEM-image of a DMOS-switch with aluminum in the power metallization after exposure to power-cycle stress. A massive buckling of the metallization and passivation cracks are visible, as well as aluminum extrusions at the broken edges Abstract-In this article th… Show more

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Cited by 12 publications
(2 citation statements)
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“…The robustness of smart power switches against active thermal cycling stress, driven by large variations in power dissipation, has become a major concern in automotive applications over the last years [1], [2], [3]. Various approaches have been presented to define standard test procedures for cycling operating conditions, among them inductive switching [4], [5] and repetitive short circuit events [6].…”
Section: Representative Measurements Of Industry Standard High Currenmentioning
confidence: 99%
“…The robustness of smart power switches against active thermal cycling stress, driven by large variations in power dissipation, has become a major concern in automotive applications over the last years [1], [2], [3]. Various approaches have been presented to define standard test procedures for cycling operating conditions, among them inductive switching [4], [5] and repetitive short circuit events [6].…”
Section: Representative Measurements Of Industry Standard High Currenmentioning
confidence: 99%
“…The difference in the coefficient of thermal expansion between the aluminum and the interlayer dielectric results in thermo-mechanical stress, which causes failure, such as interlayer dielectric (ILD) cracks. 18,19) To reduce the process cost, there is an increasing demand for further shrinkage on DMOS. This causes a high power density on the chip.…”
Section: Introductionmentioning
confidence: 99%