Power Gain in Feedback Amplifier

Mason, S. J.

doi:10.1109/tct.1954.1083579

Cited by 276 publications

(79 citation statements)

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“…Since our LNA is now neutralized, we can use the expressions for unilateral power gain as a figure of merit for the maximum achievable power gain [9]. Normally, is expressed in terms of -parameters [10], however, for this work it is more convenient to express it in terms of the -parameters of the neutralized LNA [see (27) in the Appendix]: (6) Note that this gain definition is only valid for an unconditionally stable amplifier.…”

Section: A Condition For Unilateralizationmentioning

confidence: 99%

“…The feedback topology combines nonenergetic transformer current feedback (TCF) [7] and classical ISF. In addition, the current-feedback transformer can be used to neutralize the undesired negative feedback through the collector-base capacitance , resulting in a unilateral single-transistor amplifier with excellent output-to-input isolation [8], [9]. Note, that such an amplifier can provide unconditional stability and maximum unilateral power gain [10], which is beneficial to meet the gain requirements at low dc-currents.…”

Section: Introductionmentioning

confidence: 99%

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On the design of unilateral dual-loop feedback low-noise amplifiers with simultaneous noise, impedance, and IIP3 match

Heijden

Vreede

Burghartz

2004

IEEE J. Solid-State Circuits

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Abstract-This work describes the theory and design of a nonenergetic dual-loop feedback low-noise amplifier (LNA) that provides maximum unilateral gain and simultaneous noise and impedance matching conditions. The dual-loop feedback is implemented in the form of transformer current-feedback and inductive series feedback (emitter degeneration). The current-feedback transformer is also used to neutralize the base-collector capacitance ( ), by combining it with a properly dimensioned shunt admittance at the collector output. The result is a single-transistor unilateral-gain amplifier with high isolation and good stability, eliminating the need for a cascode stage and thus enabeling the use of a lower dc-supply voltage. For the complete LNA, simple design equations are derived for the unilateralization, noise, and impedance matching requirements. Finally, second-harmonic tuning at the source improves the linearity without compromising the simultaneous noise and impedance match. To verify the presented theory, a 900-MHz hybrid Si BJT LNA has been implemented, which achieves 1.3-dB noise figure, 15-dB gain, 55 dB isolation, and +10 dBm IIP3 using a conventional double poly transistor, consuming = 2 5 mA at = 1 5 V.Index Terms-Linearity, low noise amplifier (LNA), negative feedback amplifier, noise matching, radio-frequency integrated circuit design, Si-SiGe analog circuit design, third-order distortion, third-order intermodulation distortion (IM3).

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Section: A Condition For Unilateralizationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

On the design of unilateral dual-loop feedback low-noise amplifiers with simultaneous noise, impedance, and IIP3 match

Heijden

Vreede

Burghartz

2004

IEEE J. Solid-State Circuits

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“…We certainly have seen correlation between low The interfacial gate resistance, and its characteristic scaling, also affect the optimization of the device. The ultimate invariant measure of FET small-signal AC performance is often considered to be Mason's unilateral gain G u [11]. Because of the potential resonant behavior of G u and its deviation from a -20-dB/decade frequency dependence, we optimize the actual f max .…”

Section: Consequences Of the Interfacial Gate Resistancementioning

confidence: 99%

“…Fig. 1 shows the predicted frequency dependence of Mason's unilateral gain G u [11]. Measured G u (f) usually shows smooth behavior, from which f max is typically estimated by extrapolation at -20 dB/decade.…”

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confidence: 99%

Interfacial gate resistance in Schottky-barrier-gate field-effect transistors

Rohdin

Moll

et al. 1998

IEEE Trans. Electron Devices

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gate resistance, MODFET, MESFET, skin effectWe discuss in depth a previously overlooked component in the gate resistance Rg of SchottkyBarrier-Gate FETs, in particular 0.1-µm gate-length AlInAs/GaInAs MODFETs. The high-frequency noise and power gain of these FETs depends critically on Rg. This has been the motivation for the development of T-gates which keep the gate finger metallization resistance Rga (proportional to the gate width Wg) low, even for very short gate length Lg. Rga increases with frequency due to the skin effect, but our 3D numerical modeling shows conclusively that this effect is negligible. We show that the always "larger-thanexpected" Rg, is instead caused by a component Rgi which scales inversely with Wg. We interpret Rgi as a metal-semiconductor interfacial gate resistance. The dominance of Rgi profoundly affects device optimization and model scaling. For GaAs and InP based SBGFETs there appears to exist a smallest practically achievable normalized interfacial gate resistance rgi on the order of 10 -7 Ωcm 2 . AbstractWe discuss in depth a previously overlooked component in the gate resistance R g of Schottky-Barrier-Gate FETs, in particular 0.1-µm gate-length AlInAs/GaInAs MODFETs.The high-frequency noise and power gain of these FETs depends critically on R g . This has been the motivation for the development of T-gates which keep the gate finger metallization resistance R ga (proportional to the gate width W g ) low, even for very short gate length L g . R ga increases with frequency due to the skin effect, but our 3D numerical modeling shows conclusively that this effect is negligible. We show that the always "larger-thanexpected" R g , is instead caused by a component R gi which scales inversely with W g . We interpret R gi as a metal-semiconductor interfacial gate resistance. The dominance of R gi profoundly affects device optimization and model scaling. For GaAs and InP based SBGFETs there appears to exist a smallest practically achievable normalized interfacial gate resistance r gi on the order of 10 -7 Ωcm2 .

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“…With these assumptions, the transmission matrix of the transistor becomes and the loss ratio becomes L 87A = -(-18 + .084s) (27) which is roughly 10 percent below the true value. A much rougher ap proximation is obtained by ignoring the contribution of the active path entirely, a good strategy where the loss ratio is controlled primarily by the feedback.…”

Section: ^H7amentioning

confidence: 99%