Power model validation through thermal measurements

Abstract

Simulation environments are an indispensable tool in the design, prototyping, performance evaluation, and analysis of computer systems. Simulator must be able to faithfully reflect the behavior of the system being analyzed. To ensure the accuracy of the simulator, it must be verified and determined to closely match empirical data. Modern processors provide enough performance counters to validate the majority of the performance models; nevertheless, the information provided is not enough to validate power and thermal models.In order to address some of the difficulties associated with the validation of power and thermal models, this paper proposes an infrared measurement setup to capture run-time power consumption and thermal characteristics of modern chips. We use infrared cameras with high spatial resolution (10x10μm) and high frame rate (125fps) to capture thermal maps. To generate a detailed power breakdown (leakage and dynamic) for each processor floorplan unit, we employ genetic algorithms. The genetic algorithm finds a power equation for each floorplan block that produces the measured temperature for a given thermal package. The difference between the predicted power and the externally measured power consumption for an AMD Athlon analyzed in this paper has less than 1% discrepancy. As an example of applicability, we compare the obtained measurements with CACTI power models, and propose extensions to existing thermal models to increase accuracy.

Multi-optimization power management for chip multiprocessors

“…Wattch is a widely-used architecturelevel power simulator and provides a reasonably-accurate dynamic power model. To simulate static power, we adapt leakage data from a commercial processor [26]. This data was collected from a highspeed thermal scope, which measured localized component temperature in a processor.…”

System-Level Analysis and Design under Uncertainty

“…We can then apply a fixed workload-for instance, we can run the same application under the same conditions-to a few dies on the wafer and measure the corresponding temperature profiles. Since temperature does not require extra equipment to be deployed on the wafer and can be tracked using infrared cameras [78] or built-in components of the dies, our approach can reduce the costs associated with analysis of process variation. The results of our framework applied to a set of noisy temperature profiles measured only on 7% of the dies are shown on the right-hand side of Figure 4.1, and the locations of the measured dies are depicted on the left-hand side of Figure 4.2.…”

“…In [84], the authors consider an inverse problem focused on the inference of power consumption based on transient temperature maps by means of Markov random fields. Another temperature-based characterization of power is developed in [78] where a genetic algorithm is employed for the reconstruction of the power model.…”

“…Consequently, they often lead to excessive costs and have a limited range of applicability. On the other hand, the approaches given in [78,84], which concentrate on the power consumption of a single die, are not concerned with process variation.…”

“…In this subsection, we vary the standard deviation of measurement noise, which corrupts H. The cases being considered are 0°C, 0.5°C, 1°C, and 2°C [78]. Note that the corresponding prior in Equation 4.7 is kept unchanged.…”