Power modeling and analysis in early design phases

Fischer, Bernhard; Cech, Christian; Muhr, Hannes

doi:10.7873/date.2014.210

Cited by 4 publications

(1 citation statement)

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“…The initial solution to this deficiency, which is still being used in some cases, was the use of spreadsheets. The spreadsheet approach is fast for average power evaluation, however verifying power dissipation over time and securing the system against power peaks is only possible when timing is taken into account [1]. There has been some research on extending SystemC or providing new libraries for power aware simulation.…”

Section: Related Workmentioning

confidence: 99%

Powermonitor: a versatile API for automated power-aware ESL design

Samei

Dömer

2014

Proceedings of the 2014 Forum on Specification and Design Languages (FDL)

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Abstract-System Level Description Languages (SLDL) emerged a decade ago for high-level System-on-Chip (SoC) design and efficient design space exploration. Initially performance and area constraints were the major concerns. Nowadays the shrinking of transistor size has brought power and temperature to top of the list of designer concerns. Although SLDLs are welldefined for functional and timing modeling, the dimension for power-and temperature-aware modeling is missing and needs to be added manually by the user in an ad-hoc fashion. In this paper we introduce; PowerMonitor as an Application Programming Interface (API) capable of (a) power annotation in the executable model, (b) power-aware simulation, and (c) monitoring and graphically representing power dissipation at the system level with flexible granularity and compositions.

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Section: Related Workmentioning

confidence: 99%