Power Supply Noise Aware Task Scheduling on Homogeneous 3D MPSoCs Considering the Thermal Constraint

Abstract

Thanks to the emerging 3D integration technology, The multiprocessor system-on-chips (MPSoCs) can now integrate more IP cores on chip with improved energy efficiency. However, several severe challenges also rise up for 3D ICs due to the die-stacking architecture. Among them, power supply noise becomes a big concern. In the paper, we investigate power supply noise (PSN) interactions among different cores and tiers and show that PSN variations largely depend on task assignments. On the other hand, high integration density incurs severe thermal issue on 3D ICs. In the paper, we propose a novel Yinglin Zhao and Yuanqing Cheng have equal contributions in this work.