Power Transistor Crystal Damage in Inductive Load Switching: A Reliability Concern

Gaur, S.P.; Lowe, G; Thorpe, W.

doi:10.1109/irps.1977.362797

Cited by 7 publications

(4 citation statements)

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“…Experimental studies reported in Ref. [16] have shown that the crystal damage is at the n -n C interface under the center of the emitter as the device is subjected to high voltage and high current operating conditions. It is believed from Ref.…”

Section: Comparison With Experimental Resultsmentioning

confidence: 99%

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EMP injection damage effects of a bipolar transistor and its relationship between the injecting voltage and energy

Chai

Ren

et al. 2010

J. Semicond.

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The response of a bipolar transistor (BJT) under a square-wave electromagnetic pulse (EMP) with different injecting voltages is investigated. Adopting the curve fitting method, the relationship between the burnout time, the damage energy and the injecting voltage is obtained. Research shows that the damage energy is not a constant value, but changes with the injecting voltage level. By use of the device simulator Medici, the internal behavior of the burned device is analyzed. Simulation results indicate that the variation of the damage energy with injecting voltage is caused by the distribution change of hot spot position under different injection levels. Therefore, the traditional way to evaluate the trade-off between the burnout time and the injecting voltage is not comprehensive due to the variation of the damage energy.

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Section: Comparison With Experimental Resultsmentioning

confidence: 99%

“…It is believed from Ref. [16] that the crystal damage is due to local heating. Figure 9 is the cross-sectional view of the device showing the defect location.…”

Section: Comparison With Experimental Resultsmentioning

confidence: 99%

EMP injection damage effects of a bipolar transistor and its relationship between the injecting voltage and energy

Chai

Ren

et al. 2010

J. Semicond.

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“…Internal crystal damage has been observed in a power transistor with design parameters of Table 2, after on / off switching in a circuit with an inductive load. Infrared scanning and cross-sectioning and visual inspection of the chip revealed the crystal damage at the n--n+ interface under the center of the emitter [27]. The transistor, however, showed no degradation in electrical parameters after about 1000 hours of operation.…”

Section: For a Constant Current Level And Different Values Of V Cb 'mentioning

confidence: 98%

“…The diameter of the defect is about 38 JLm (1.5 mil). It is believed [27] that the crystal damage is due to local heatditions. For "on" conditions where the V CB is small (a few volts) and the current through the device is high (4 -5 A), the electric field peaks at the n--n+ interface, as seen from Fig.…”

Section: For a Constant Current Level And Different Values Of V Cb 'mentioning

confidence: 99%

Two-Dimensional Analysis of High-Voltage Power Transistors

Gaur

1977

IBM J. Res. & Dev.

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The internal behavior of a typical n-p-n-n" high-voltage power transistor is presented for several specific steady-state operating conditions obtained from a two-dimensional mathematical model. Internal self-heating and avalanche multiplication effects are taken into account. Poisson's equation, electron and hole continuity equations, and the heat flow equation are solved numerically in a two-dimensional region with the input parameters of device dimensions, doping profile, boundary conditions for external contacts, and various material constants for silicon. The collector n--n+ interface is the region of high electrical and thermal stress that causes second breakdown failure at high-voltage and high-current operating conditions. The combined effects of various high-injection levels are illustrated. 306 s. P. GAUR

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The influence of package thermal resistance on the EMP injection damage effect of transistors

Ren

Chai

et al. 2010

2010 11th International Conference on Electronic Packaging Technology &Amp; High Density Packaging

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Power Transistor Crystal Damage in Inductive Load Switching: A Reliability Concern

Cited by 7 publications

References 0 publications

EMP injection damage effects of a bipolar transistor and its relationship between the injecting voltage and energy

EMP injection damage effects of a bipolar transistor and its relationship between the injecting voltage and energy

Two-Dimensional Analysis of High-Voltage Power Transistors

The influence of package thermal resistance on the EMP injection damage effect of transistors

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