Proceedings Sixth International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000) (Cat. No. PR00
DOI: 10.1109/async.2000.836791
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Practical design of globally-asynchronous locally-synchronous systems

Abstract: In this paper we describe a complete design methodology for a globally asynchronous on-chip communication network connecting both locally-synchronous and asynchronous modules. Synchronous modules are equipped with asynchronous wrappers which adapt their interfaces to the self-timed environment and prevent metastability. These wrappers are assembled from a concise library of predesigned technology-independent elements and provide high-speed data transfer. We confirmed the validity of our concept by applying it … Show more

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Cited by 204 publications
(118 citation statements)
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“…These concerns can be generally attributed to data and system safety issues. Although the simulations and tests reported in [8] and [9] show that their design works properly, such simulations and tests can only cover a small fraction of all possible configurations of relative delays in asynchronous communication, while we find that various malfunctions may still emerge under different relative delays. Applying formal verification, we find the potential pitfalls and provide delay constraints that permit to size the circuits so that the pitfalls are avoided.…”
Section: Introductionmentioning
confidence: 99%
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“…These concerns can be generally attributed to data and system safety issues. Although the simulations and tests reported in [8] and [9] show that their design works properly, such simulations and tests can only cover a small fraction of all possible configurations of relative delays in asynchronous communication, while we find that various malfunctions may still emerge under different relative delays. Applying formal verification, we find the potential pitfalls and provide delay constraints that permit to size the circuits so that the pitfalls are avoided.…”
Section: Introductionmentioning
confidence: 99%
“…In this paper, we: 1) propose new data transition model to represent the implicit relationship between clock and data validity events; 2) construct comprehensive implementation models for the asynchronous wrapper and the asynchronous communication scheme; 3) report several design pitfalls, including hazards in a design, obtained from 3D synthesizing tool, which claimed by [9] to be hazard-free; 4) provide relative timing constraints that were not mentioned by [8] and [9], along with fault diagnosis which indicates that the disregard of these constraints can cause system deadlock or erroneous data transfers.…”
Section: Introductionmentioning
confidence: 99%
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“…However, we would like to advance the radical proposition that computations with the same desirable properties can be achieved by (something which is in effect) a simulation of a molecular computer on a modular asynchronous spatial computer constructed from conventional electronic components. As an alternative to the von Neumann stored-program computer, asynchronous spatial computers have attracted considerable interest [1,4,5,12,13].…”
Section: A Modular Asynchronous Spatial Computermentioning
confidence: 99%