Pre-architectural performance estimation for ASIP design based on abstract processor models

Abstract

Application Specific Instruction Set Processors (ASIPs) seek for an optimal performance/area/energy trade-off for a given algorithm. In all current design methodologies an architectural model must be first manually created based on designers experience. These models are increasingly refined until the design constraints are met, through several time consuming algorithmic/architecture co-exploration iterations. This paper presents a novel performance estimation approach that shortens the design cycle of existing methodologies by providing an early assessment of the impact of customizations on the achievable performance. The approach does so by eliminating the need for a completely specified architecture, without limiting designer's freedom and without simulating the application repeatedly. Overall, our approach reduces the number of necessary coexploration iterations, thus increasing design productivity. We validate our approach via two different case studies: a butterflyenabled ASIP for Fast Fourier Transform computation and a Connected Components Labeling ASIP for computer vision.

Application-Specific Architecture Exploration Based on Processor-Agnostic Performance Estimation

“…We then manually created its high-level model and then ran the estimation, simulation and synthesis processes (See Table 1). It is worth noting that estimation still greatly outperforms simulation in terms of execution speed, as was previously shown in [3].…”

“…This yields the output cycle-approximate performance estimate of the full application. Estimation errors are within ±13% of cycle-accurate simulation results of the target processor [3].…”

“…Our framework comprises a performance estimation engine (PE), which is able to generate cycle-approximate estimates for an application at pre-architectural stages [3]. It is centered on a high-level processor model that abstracts away all unnecessary architectural details, while keeping only the features that are needed to derive meaningful estimates.…”

“…These provide the designer with a metric (e.g. mappability [2] and cycle approximates [3]), which represents the matching between a proposed ASIP (expressed as an abstract model) and its target application. These metrics help to eliminate some implementation steps, therefore reducing design time.…”