Predicting ${X}$ -Sensitivity of Circuit-Inputs on Test-Coverage: A Machine-Learning Approach

Pradhan, Manjari; Bhattacharya, Bhaswar B.; Chakrabarty, Krishnendu; Bhattacharya, Bhargab B.

doi:10.1109/tcad.2018.2878169

Cited by 13 publications

(9 citation statements)

References 31 publications

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“…For each choice of the length of PRPG, test‐cost is predicted, and the length corresponding to the minimum cost is selected. (Li et al, 2017; Pradhan et al, 2019).…”

Section: Atpg Test Cost and Testability Issuesmentioning

confidence: 99%

“…Moreover, in the post‐silicon validation phase, lot of design bugs that are identified exhibit themselves as X ‐values. X ‐sensitivity, that is, the effect of X on the loss of fault‐coverage in digital circuits has been studied in Pradhan et al (2019). A fast and effective method for predicting X ‐sensitivity of inputs in a digital circuit has been proposed.…”

Section: Atpg Test Cost and Testability Issuesmentioning

confidence: 99%

“…Circuit parameters: Number of input/output port, details of scan‐chain (Li, Colburn, Pagalone, Narayanun, & Chakrabarty, 2017). Circuit structure: The logical network structure, represented as a directed graph, provides a rich source data (Ma et al, 2019; Pradhan, Bhattacharya, Chakrabarty, & Bhattacharya, 2019). The gate‐level description of a netlist also provides functional and state information of the logic circuit. Physical layout (L. R. Gómez & Wunderlich, 2016; Nelson, Tam, & Blanton, 2010).…”

Section: Introductionmentioning

confidence: 99%

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A survey of digital circuit testing in the light of machine learning

Pradhan

Bhattacharya

2020

WIREs Data Min & Knowl

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The insistent trend in today's nanoscale technology, to keep abreast of the Moore's law, has been continually opening up newer challenges to circuit designers. With rapid downscaling of integration, the intricacies involved in the manufacturing process have escalated significantly. Concomitantly, the nature of defects in silicon chips has become more complex and unpredictable, adding further difficulty in circuit testing and diagnosis. The volume of test data has surged and the parameters that govern testing of integrated circuits have increased not only in dimension but also in the complexity of their correlation. Evidently, the current scenario serves as a pertinent platform to explore new test solutions based on machine learning. In this survey, we look at various recent advances in this evolving domain in the context of digital logic testing and diagnosis. This article is categorized under: Algorithmic Development > Structure Discovery Technologies > Machine Learning Technologies > Prediction

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“…For each choice of the length of PRPG, test‐cost is predicted, and the length corresponding to the minimum cost is selected. (Li et al, 2017; Pradhan et al, 2019).…”

Section: Atpg Test Cost and Testability Issuesmentioning

confidence: 99%

Section: Atpg Test Cost and Testability Issuesmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A survey of digital circuit testing in the light of machine learning

Pradhan

Bhattacharya

2020

WIREs Data Min & Knowl

Self Cite

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“…This study focuses on ε-SVR model. This method uses a concept of ε-insensitive loss function where the training data has at most ε deviation from targets y i [38]- [42]. Loss function calculates the distance between the observed value y and the ε boundary by treating those error equal to zero that lie within ε distance of the observed value.…”

Section: A Support Vector Regression (Svr)mentioning

confidence: 99%

“…Now, the best estimated function f (x) or the optimal solution of the convex optimization can be derived by solving (5) and (6) using the famous Sequential Minimal Optimization (SMO) algorithm expressed by (8). Here, K(•) denotes the kernel function, x j is the support vector, n is the number of support vectors, the term in bracket represents weight coefficient of support vectors [41]- [42], and b is the bias.…”

Section: A Support Vector Regression (Svr)mentioning

confidence: 99%

A Generic and Efficient Globalized Kernel Mapping-Based Small-Signal Behavioral Modeling for GaN HEMT

et al. 2020

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The work reported in this paper explores a novel Particle Swarm Optimization (PSO) tuned Support Vector Regression (SVR) based technique to develop the small-signal behavioral model for GaN High Electron Mobility Transistor (HEMT). The proposed technique investigates issues such as kernel selection and model optimization usually encountered in the application of SVR to model the GaN based HEMT devices. Here, the PSO algorithm is utilized to find the optimal hyperparameters to minimize the fitness function. To enumerate the efficiency and the generalization capability of the predictors, the performance of the model is investigated in terms of mean square error (MSE) and mean relative error (MRE). A very good agreement is found between the measured S-parameters and the proposed model for multi-biasing sets over the complete frequency range of 1 GHz-18 GHz. The proposed technique is even used to test the frequency extrapolation capability of the model. A comparative analysis indicates that the proposed PSO-SVR predictor achieves significantly improved computational efficiency and the overall prediction accuracy. To demonstrate the ready usefulness of the modeling approach, the developed model has been incorporated in CAD environment using MATLAB Cosimulation in ADS Ptolemy. Subsequently, the small-signal stability analysis is performed and gain of a power amplifier configuration designed using the proposed GaN HEMT model is determined.

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Machine Learning for Testability Prediction

2022

Machine Learning Applications in Electronic Design Automation

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Predicting ${X}$ -Sensitivity of Circuit-Inputs on Test-Coverage: A Machine-Learning Approach

Cited by 13 publications

References 31 publications

A survey of digital circuit testing in the light of machine learning

A survey of digital circuit testing in the light of machine learning

A Generic and Efficient Globalized Kernel Mapping-Based Small-Signal Behavioral Modeling for GaN HEMT

Machine Learning for Testability Prediction

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