Predictions of Proton Cross-Section and Sensitive Thickness for Analog Single-Event Transients

Weulersse, C.; Morand, S.; Miller, F.; Carrière, T.; Mangeret, R.

doi:10.1109/tns.2016.2541692

Cited by 2 publications

(1 citation statement)

References 17 publications

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“…Although the cross-section calculations were performed for heavy ions, the protons are expected to dominate the SEE rates in the LEO and ISS orbits. Due to its improved accuracy when compared to analytical models, the METIS method [18,30,31] was used to predict the protoninduced SET cross section curves from the heavy ions data. The sum of the SET rate induced by heavy ions and protons are shown in Fig.…”

Section: Prediction Of In-orbit Set Ratesmentioning

confidence: 99%

Exploiting Transistor Folding Layout as RHBD Technique Against Single-Event Transients

Aguiar

Wrobel

Autran

et al. 2020

IEEE Trans. Nucl. Sci.

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Radiation hardening techniques can be extensively used in the design level to improve the robustness of VLSI circuits used in space applications. Accordingly, this work analyzes the efficiency of transistor folding layout in improving the Single-Event Transient robustness of digital circuits. Additionally, diffusion splitting is proposed to reduce the area overhead of multiple-finger designs. Besides increasing threshold Linear Energy Transfer, results show that both techniques can also reduce the overall cross-section and the in-orbit SET rate for protons and heavy ions in LEO and ISS orbits.

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Section: Prediction Of In-orbit Set Ratesmentioning

confidence: 99%

Exploiting Transistor Folding Layout as RHBD Technique Against Single-Event Transients

Aguiar

Wrobel

Autran

et al. 2020

IEEE Trans. Nucl. Sci.

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Analysis of Layout-Based RHBD Techniques

Aguiar,

Wrobel,

Autran

et al. 2024

Single-Event Effects, From Space to Accelerator Environments

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Radiation hardening techniques play a pivotal role in enhancing the resilience of VLSI circuits employed in radiation environments, most notably in critical applications such as in space technologies. Building upon the preceding chapter, some Radiation Hardening by Design (RHBD) techniques have been devised to effectively counteract the detrimental impact of radiation on electronic circuits, addressing diverse levels of abstraction ranging from circuit layout to system and software design. This chapter delves into an insightful analysis of the efficacy achieved through layout design techniques, namely Gate Sizing (GS), Transistor Stacking (TS), and Transistor Folding (TF). Moreover, it explores the utilization of asymmetric designs and the innovative Diffusion Splitting (DS) technique as means to augment the hardening efficiency while mitigating the associated area overhead.

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Predictions of Proton Cross-Section and Sensitive Thickness for Analog Single-Event Transients

Cited by 2 publications

References 17 publications

Exploiting Transistor Folding Layout as RHBD Technique Against Single-Event Transients

Exploiting Transistor Folding Layout as RHBD Technique Against Single-Event Transients

Analysis of Layout-Based RHBD Techniques

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