Price theory based power management for heterogeneous multi-cores

Muthukaruppan, Thannirmalai Somu; Pathania, Anuj; Mitra, Tulika

doi:10.1145/2654822.2541974

Cited by 19 publications

(13 citation statements)

References 27 publications

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“…6,12,19,20 Markets and price theory can allocate and manage heterogeneous servers. 8,9,17 Demand response models can handle power emergencies. 3,11 We link system architecture and algorithmic economics to decentralize the allocation of shared resources to strategic users.…”

Section: Resultsmentioning

confidence: 99%

Distributed strategies for computational sprints

2019

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Computational sprinting is a class of mechanisms that boost performance but dissipate additional power. We describe a sprinting architecture in which many, independent chip multiprocessors share a power supply and sprints are constrained by the chips' thermal limits and the rack's power limits. Moreover, we present the computational sprinting game, a multi-agent perspective on managing sprints. Strategic agents decide whether to sprint based on application phases and system conditions. The game produces an equilibrium that improves task throughput for data analytics workloads by 4-6× over prior greedy heuristics and performs within 90% of an upper bound on throughput from a globally optimized policy.

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Section: Resultsmentioning

confidence: 99%

Distributed strategies for computational sprints

2019

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“…Besides a large body of research proposals, we already see processor manufacturers offering heterogeneous products [15,19,24,39]. There is a large body of research on scheduling and resource management on single-ISA heterogeneous CMPs (such as [17,37,38] and more). General-purpose Heterogeneous-ISA multicore architectures [18,43] include microarchitecturally heterogeneous cores that implement different ISAs.…”

Section: Background and Related Workmentioning

confidence: 99%

Deciphering Predictive Schedulers for Heterogeneous-ISA Multicore Architectures

Prodromou

Venkat

Tullsen

2019

Proceedings of the 10th International Workshop on Programming Models and Applications for Multicores and Manycores

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Heterogeneous architectures have become increasingly common. From co-packaging small and large cores, to GPUs alongside CPUs, to general-purpose heterogeneous-ISA architectures with cores implementing different ISAs. As diversity of execution cores grows, predictive models become of paramount importance for scheduling and resource allocation. In this paper, we investigate the capabilities of performance predictors in a heterogeneous-ISA setting, as well as the predictors' effects on scheduler quality. We follow an unbiased feature selection methodology to identify the optimal set of features for this task, instead of pre-selecting features before training. We propose metrics that bridge the gap between traditional prediction accuracy metrics and a scheduler's performance. We further present our evaluation methodology, which was meticulously designed with this study in mind, and finally, we incorporate our findings in MLbased schedulers and evaluate their sensitivity to the underlying system's level of heterogeneity.

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“…This scalability issue is addressed through a distributed approach based on the solid foundations of price theory from economics in Ref. [68]. The resource allocation, DVFS, task mapping, and migration are all controlled through the virtual market place, where the commodity being traded is processing unit using virtual money.…”

Section: Software Supportmentioning

confidence: 99%

Heterogeneous Multi-core Architectures

Mitra

2015

IPSJ Transactions on System LSI Design Methodology

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Transistor count continues to increase for silicon devices following Moore's Law. But the failure of Dennard scaling has brought the computing community to a crossroad where power has become the major limiting factor. Thus future chips can have many cores; but only a fraction of them can be switched on at any point in time. This dark silicon era, where significant fraction of the chip real estate remains dark, has necessitated a fundamental rethinking in architectural designs. In this context, heterogeneous multi-core architectures combining functionality and performance-wise divergent mix of processing cores (CPU, GPU, special-purpose accelerators, and reconfigurable computing) offer a promising option. Heterogeneous multi-cores can potentially provide energy-efficient computation as only the cores most suitable for the current computation need to be switched on. This article presents an overview of the state-of-the-art in heterogeneous multi-core landscape.

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Price theory based power management for heterogeneous multi-cores

Cited by 19 publications

References 27 publications

Distributed strategies for computational sprints

Distributed strategies for computational sprints

Deciphering Predictive Schedulers for Heterogeneous-ISA Multicore Architectures

Heterogeneous Multi-core Architectures

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