Process control and material properties of thin electroless Co-based capping layers for copper interconnects

Petrov, Nicolai; Valverde, Charles; Chen, Qing‐Yun; Xu, Chao; Paneccasio, Vincent; Stritch, Daniel; Witt, C.; Walker, Elizabeth; Barnes, J.J.; Pavlov, Michael; Shalyt, Eugene

doi:10.1117/12.632504

Cited by 4 publications

(1 citation statement)

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“…With the current density, temperature, temperature gradient and thermomechanical stress gradient obtained from the electro-thermo-structural simulations, the AFDs due to the three driving forces and the total AFD in the interconnects at a specific load step can be obtained. With recent process improvement on the use of metal cap on Cu interconnects, one can assume a strong Cu/cap layer interface [104], and the void nucleation location (i.e. the EM weak spot) is found at the contact or via bottom as determined by the location of the maximum total AFD [105].…”

Section: Distributions Of the Atomic Flux Divergencesmentioning

confidence: 99%

3D electromigration modeling at the circuit layout level

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Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels. Electromigration (EM) in the interconnects has now become the dominant failure mechanism that determines the circuit reliability. To model the EM reliability of the interconnects in ICs, a 3-dimensional (3D) electro-thermo-structural model as opposed to the conventional current density based 2-dimensional (2D) models is now necessary because ICs are 3D in their actual physical implementation. In this work, we study the EM reliability of the interconnects in ICs using a 3D finite element circuit model. A simplified circuit structure with only the intra-block interconnects is used as an example to show the construction of a 3D finite element model from its 2D IC layout. This modeling method is then used in the analysis of a realistic circuit structure with the inclusion of both intra-and inter-block interconnects. Transient electro-thermo-structural simulations are carried out using both Cadence (a circuit simulator) and ANSYS (a finite element tool). By limiting our study only to EM failure, the current density, temperature and thermo-mechanical stress II distributions of the interconnects are computed by considering the heat transfer and Joule heating, and these values are used to compute the atomic flux divergences

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Section: Distributions Of the Atomic Flux Divergencesmentioning

confidence: 99%