Process-Induced Strained P-MOSFET Featuring Nickel-Platinum Silicided Source/Drain

Lee, Rinus Tek Po; Liow, Tsung-Yang; Tan, Kian-Ming; Ang, Kah‐Wee; Chui, King-Jien; Guo, Q; Samudra, Ganesh S.; Chi, Dongzhi; Yeo, Yee-Chia

doi:10.1557/proc-0913-d02-04

Cited by 3 publications

(2 citation statements)

References 9 publications

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“…Coupled with the improved morphological stability [i.e., lower ρ sheet ], FinFETs with Ni 0.90 Pt 0.10 SiGe contacts exhibit an overall drive current enhancement of 18%. The large drive current enhancement observed for a 15% reduction in R series is attributed to the dominance of R series on the performance of FinFETs [18] and beneficial silicide induced strain effects with the addition of Pt [19]. Our linear transconductance versus gate voltage data shows a higher linear peak transconductance for devices with Ni 1−y Pt y SiGe contacts that is indicative of enhanced mobility (not shown).…”

Section: Resultsmentioning

confidence: 77%

P-Channel Tri-Gate FinFETs Featuring $\hbox{Ni}_{1 - y}\hbox{Pt}_{y} \hbox{SiGe}$ Source/Drain Contacts for Enhanced Drive Current Performance

Lee

Tan

Lim

et al. 2008

IEEE Electron Device Lett.

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We report the integration of nickel platinum germanosilicide (Ni 1−y Pt y SiGe) contacts in tri-gate FinFETs with silicon germanium source/drain stressors for enhanced drive current performance. The structural and electrical properties of Ni 1−y Pt y SiGe contacts with platinum (Pt) concentrations up to 20 atomic % (at. %) were explored for FinFET integration. Our results show that Ni 1−y Pt y SiGe incorporated with 10 at. % Pt shows superior morphological stability, a suitably low sheet resistivity and the lowest Schottky hole barrier height (Φ P B ) among the Ni 1−y Pt y SiGe candidates evaluated. The low Φ P B (0.309 eV) provides a 15% reduction in series resistance R series . With a superior morphological stability and reduced R series , FinFETs integrated with Ni 0.90 Pt 0.10 SiGe contacts exhibit an overall 18% improvement in drive current compared to FinFETs with NiSiGe contacts.

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Section: Resultsmentioning

confidence: 77%

P-Channel Tri-Gate FinFETs Featuring $\hbox{Ni}_{1 - y}\hbox{Pt}_{y} \hbox{SiGe}$ Source/Drain Contacts for Enhanced Drive Current Performance

Lee

Tan

Lim

et al. 2008

IEEE Electron Device Lett.

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“…The wafers were also aligned to give a <100> channel direction to help PMOS performance. Platinumdoped NiSi was used, which improves thermal stability of the NiSi, but it is also reported to improve PMOS mobility [4].…”

Section: Umc/xilinx Virtex-5mentioning

confidence: 99%

From Strain to High-K/Metal Gate ¿ the 65 ¿ 45 nm Transition

James

2008

2008 IEEE/SEMI Advanced Semiconductor Manufacturing Conference

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2007 saw the introduction of the first 45-nm process node devices into the marketplace. This node is notable not only for the expected reduction in feature sizes, but also for the introduction of a high-k dielectric and metal gate into the transistor structure.At the time of paper submission, Intel is the only company manufacturing high-k/metal gates in its 45-nm product. Other leading-edge manufacturers have announced that they will start 45-nm production in 2007/2008, but have been less specific as to when they will adopt the new materials. Chipworks, as a supplier of competitive intelligence to the semiconductor and electronics industries, monitors the evolution of chip processes as they come into commercial production. Chipworks has obtained parts from the leading edge vendors, and performed structural analyses to examine the features and manufacturing processes of the devices.The paper discusses some of the different transistor structures we have seen during the evolution of 65-nm technology, and examines the first 45-nm parts introduced. The paper also looks at the interpretation of "65-nm" and "45-nm" by the different manufacturers.

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The effects of nickel germanosilicide contacts on the biaxial compressive stress in thin epitaxial silicon-germanium alloys on silicon

Chopra

Öztürk

Misra

et al. 2007

Applied Physics Letters

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When a thin Si1−xGex epitaxial layer is grown on Si, it is under biaxial compression. In this letter, it is shown that a nickel germanosilicide (NiSi1−xGex) layer formed on Si1−xGex can significantly reduce the in-plane compressive strain in Si1−xGex. It is proposed that the observed reduction is due to the biaxial tensile stress applied by the NiSi1−xGex layer. Because the Si1−xGex bandgap is a strong function of the strain, this is expected to have a strong impact on the metal-semiconductor barrier height and the contact resistivity of the interface if the metal Fermi level is pinned near the Si1−xGex midgap.

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Process-Induced Strained P-MOSFET Featuring Nickel-Platinum Silicided Source/Drain

Cited by 3 publications

References 9 publications

P-Channel Tri-Gate FinFETs Featuring $\hbox{Ni}_{1 - y}\hbox{Pt}_{y} \hbox{SiGe}$ Source/Drain Contacts for Enhanced Drive Current Performance

P-Channel Tri-Gate FinFETs Featuring $\hbox{Ni}_{1 - y}\hbox{Pt}_{y} \hbox{SiGe}$ Source/Drain Contacts for Enhanced Drive Current Performance

From Strain to High-K/Metal Gate ¿ the 65 ¿ 45 nm Transition

The effects of nickel germanosilicide contacts on the biaxial compressive stress in thin epitaxial silicon-germanium alloys on silicon

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