Process Integration Considerations for 300 mm TSV Manufacturing

Ramaswami, Sesh; Dukovic, John; Eaton, B.; Pamarthy, Sharma; Bhatnagar, Anil K.; Cao, Zhitao; Sapre, Kedar; Wang, Yuchun; Kumar, Ajay

doi:10.1109/tdmr.2009.2034317

Cited by 66 publications

(33 citation statements)

References 2 publications

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“…Silicon dioxide has these properties. However, other materials such as nitride and polymers are also used as liners for TSV applications [11,12,13].…”

Section: Tsv Linermentioning

confidence: 99%

S-Parameters Optimization in both Segmented and Unsegmented Insulated TSV upto 40GHz Frequency

Atieno¹,

Zhang²,

Bai³

2017

Adv. sci. technol. eng. syst. j.

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“…Silicon dioxide has these properties. However, other materials such as nitride and polymers are also used as liners for TSV applications [11,12,13].…”

Section: Tsv Linermentioning

confidence: 99%

S-Parameters Optimization in both Segmented and Unsegmented Insulated TSV upto 40GHz Frequency

Atieno¹,

Zhang²,

Bai³

2017

Adv. sci. technol. eng. syst. j.

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“…Via-middle TSVs require a relatively large (12:1 or higher) aspect ratio [14][15][16]20]. Thus, the width of via-middle TSVs is comparable to the width of via-first TSVs whereas the height is comparable to via-last TSVs.…”

Section: Via-middle Tsvmentioning

confidence: 99%

Power Distribution in TSV-Based 3-D Processor-Memory Stacks

Satheesh

Salman

2012

IEEE J. Emerg. Sel. Topics Circuits Syst.

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Electrical Engineering Stony Brook University 2012Three primary techniques for manufacturing through silicon vias (TSVs), viafirst, via-middle, and via-last, have been analyzed and compared to distribute power in a three-dimensional (3-D) processor-memory system with nine planes. Due to distinct fabrication techniques, these TSV technologies require significantly different design constraints, as investigated in this work. A valid design space that satisfies the peak power supply noise while minimizing area overhead is identified for each technology. It is demonstrated that the area overhead of a power distribution network with via-first TSVs is approximately 9% as compared to less than 2% in via-middle and via-last technologies. Despite this drawback, a via-first based power network is typically overdamped and the issue of resonance is alleviated. A via-last based power network, however, exhibits a relatively low damping factor and the peak noise is highly sensitive to number of TSVs and decoupling capacitance.iii To my dearest parents, Jayashree Krishnamurthy and Satheesh Lakshminarayana.

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“…4(a), a typical TSV is represented as a cylinder with a diameter W tsv and depth D tsv and consists of two parts: (1) conductive material such as copper or tungsten, (2) a dielectric layer that surrounds the conductive material. The thickness of this dielectric layer t die is in the range of 0.2 µm to 1 µm [9]. In this analysis, t die is assumed to be 0.2 µm.…”

Section: ) Substrate Modelmentioning

confidence: 99%

Signal integrity analysis of a 2-D and 3-D integrated potentiostat for neurotransmitter sensing

Salman

Asgari

Stanaćević

2011

2011 IEEE Biomedical Circuits and Systems Conference (BioCAS)

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3-D integration technology offers significant advantages in implantable devices by reducing the form factor and power dissipation. Signal integrity characteristics of a 2-D and 3-D integrated potentiostat for neurotransmitter sensing are investigated and compared. The potentiostat is implemented as current integrating switched-capacitor first-order single-bit delta-sigma modulator. An electrical model is developed for the substrate, power network, and through silicon vias (TSVs). These models are combined with the neurotransmitter sensing circuit to generate an entire model to analyze signal integrity. Contrary to the conventional assumption, a 3-D integrated hybrid system does not necessarily exhibit enhanced noise isolation despite the advantage of having separate planes, as demonstrated in this paper. Noise coupling into the substrate due to TSVs is shown to be a significant mechanism that degrades signal integrity in 3-D integrated implantable systems.

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Process Integration Considerations for 300 mm TSV Manufacturing

Cited by 66 publications

References 2 publications

S-Parameters Optimization in both Segmented and Unsegmented Insulated TSV upto 40GHz Frequency

S-Parameters Optimization in both Segmented and Unsegmented Insulated TSV upto 40GHz Frequency

Power Distribution in TSV-Based 3-D Processor-Memory Stacks

Signal integrity analysis of a 2-D and 3-D integrated potentiostat for neurotransmitter sensing

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