The decrease in critical dimension (CD) of integrated circuits (IC) always challenges metrology tools capabilities. In less than ten years we will reach the limit of CMOS technology with typical printed gate length less than 20 nm and physical gate length of less than 15nm. Advanced R&D departments must already address today all the issues related to so small devices otherwise the roadmap requirements would not be fulfilled. Indeed most of the issues are directly related to metrology capabilities such as precise control of the shape of etched features, sidewall roughness, wafer CD uniformity, and mask inspection (…). All these parameters will represent a bottleneck for advanced patterning if metrology tools are unable to measure them with a precision better than few nanometers. In this paper we show that 3D metrology is mandatory to succeed in reaching future roadmap requirements. We address in details the CD AFM technique capabilities which is a potential candidate for advanced patterning metrology. The experimental data are compared with today's reference: cross-sectional analysis (X-SEM). We also discuss on other techniques such as scatterometry and top view CD-SEM which are also candidates for 3D metrology.