Programmable Photoelectric Memristor Gates for In Situ Image Compression

Berco, Dan; Ang, Diing Shenp; Kalaga, Pranav Sairam

doi:10.1002/aisy.202000079

Cited by 11 publications

(13 citation statements)

References 37 publications

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“…The image compression could be achieved by taking the generated pulses through a multilayer voltage sensor as input, mapping the image pixels into memristive conductance through the computational array, and then storing them in the other two crossbar arrays. The research conducted by Berco et al in 2020 proposed a programmable photoelectronic memristor gate circuit, which could perform state switching between optical and electrical signals, to realize in-situ image compression [42]. A research team from Dalian University of Technology [43] designed the simplest fractional-order chaotic memory circuit that identified pseudo-random sequences in image compression through phase diagrams, Lyapunov exponential spectra, and bifurcation diagrams, which achieved image compression for the second time and reduced the storage costs significantly.…”

Section: Image Compression Based On Memristive Systemsmentioning

confidence: 99%

Memristive System Based Image Processing Technology: A Review and Perspective

Dong

Zhou

et al. 2021

Electronics

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As the acquisition, transmission, storage and conversion of images become more efficient, image data are increasing explosively. At the same time, the limitations of conventional computational processing systems based on the Von Neumann architecture continue to emerge, and thus, improving the efficiency of image processing has become a key issue that has bothered scholars working on images for a long time. Memristors with non-volatile, synapse-like, as well as integrated storage-and-computation properties can be used to build intelligent processing systems that are closer to the structure and function of biological brains. They are also of great significance when constructing new intelligent image processing systems with non-Von Neumann architecture and for achieving the integrated storage and computation of image data. Based on this, this paper analyses the mathematical models of memristors and discusses their applications in conventional image processing based on memristive systems as well as image processing based on memristive neural networks, to investigate the potential of memristive systems in image processing. In addition, recent advances and implications of memristive system-based image processing are presented comprehensively, and its development opportunities and challenges in different major areas are explored as well. By establishing a complete spectrum of image processing technologies based on memristive systems, this review attempts to provide a reference for future studies in the field, and it is hoped that scholars can promote its development through interdisciplinary academic exchanges and cooperation.

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Section: Image Compression Based On Memristive Systemsmentioning

confidence: 99%

Memristive System Based Image Processing Technology: A Review and Perspective

Dong

Zhou

et al. 2021

Electronics

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“…The exploration of diversified multifunctional electronic devices is therefore a topic of intense with respect to big data, digital communication and energy sensing 4–6 . Boolean logic gates are the building blocks of computing and digital information process; for example, “AND” or “OR” logic gates can be used for address recognition, data integrity checking, 7 and can be used to form memristors 8 . “NOT” logic gates can be also used as inverters and switches.…”

Section: Introductionmentioning

confidence: 99%

A multifunctional optical‐thermal logic gate sensor array based on ferroelectric BiFeO₃ thin films

Dan

et al. 2023

InfoMat

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The growing need to process a diverse range of data has ignited effort in developing new multifunctional logic gate devices. In this article, we report a new form of all‐in‐one logic gate system that exploits the photoresponsivity of a self‐powered multifunctional BiFeO3 (BFO) sensor material. The BFO sensor can not only detect both light intensity and temperature, but it can also execute three common logic gates of “AND”, “OR”, and “NOT” by converting optical and thermal inputs into electrical output. The diverse functionality of the BFO logic gate sensor array utilizes the unique light‐and temperature‐controlled energy band structure and carrier behavior of the BFO material. To demonstrate the potential, a 3 × 3 logic gate sensor matrix is developed, which successfully detected light and temperature distributions, and accurately produced the three basic logic gate operations. This work provides a new route to construct highly integrated multifunctional electronic devices for the advancement of large sensing, communication, and computing operations.

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“…[ 30–33 ] Followed by a three‐input material, nonimplication and logic conjunction gate constructed out of two memristors and a pull‐down resistor was demonstrated that may be used to perform in situ image compression. [ 34 ]…”

Section: Introductionmentioning

confidence: 99%

“…[30][31][32][33] Followed by a three-input material, nonimplication and logic conjunction gate constructed out of two memristors and a pull-down resistor was demonstrated that may be used to perform in situ image compression. [34] The biologic retina consists of light-sensitive rods and cones. Photons (with wavelengths in the visual range) stimulate them to produce excitations that are converted into electric signals and propagated by synaptic junctions in bipolar cells.…”

mentioning

confidence: 99%

Hieroglyphically Supervised Bioinspired Visioneural Controller

Berco

Chiu

Ang

2022

Advanced Intelligent Systems

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When incorporated into intelligent control systems, hardware-based artificial neural networks (HNNs) [1][2][3] present a significant advantage over their software counterparts, especially in terms of speed. The most ubiquitous approach for the implementation of convolutional neural networks (CNNs), consisting of multilayer perceptrons, [4][5][6][7][8] is with software algorithms executed over von Neumann machines. [9,10] These are used in a wide variety of applications such as image classifications. Such algorithms are serial in nature, meaning that a central processing unit (CPU) is used to execute them in a sequential manner. As CNN operations involve a large number of vector-matrix multiplications, application-specific integrated circuits (ASICs) [11,12] were later used to implement parallel HNNs. This significant merit did not come without a cost. The main drawback was, and still is, the complexity of the design flow. In order for the frontend, high-level design to succeed, strict criteria must be met to ensure timing convergence of the backend implementation. This in turn led to field-programmable gate arrays (FPGAs) being configured as HNNs. [13][14][15][16][17] FPGA platforms offer more flexibility when compared with ASICs, at the cost of lower performance and inferior gate count. [18][19][20] Due to these limitations, some FPGA-based HNNs had to rely on low-precision arithmetic implementations, [21][22][23] while ASICs could end up having a very large gate count. As a workaround, several HNNs used offline training schemes using dedicated software. Obviously such dependencies limited their ability to operate in an autonomous fashion or undergo incremental learning while being kept online.In recent years, two approaches were developed for the implementation of bioinspired robotic vision. The first was based on event-triggered sensor arrays, [24][25][26] and the second used specialized software. [27] Using the first approach, spiking cameras were demonstrated as being able to capture fast temporal changes. [24] These apparatuses rely on specialized ASIC implementation with all the associated complexities. As for software algorithms, they were usually developed in accordance with the two visual pathway theory which states that the visual cortex can be split into dorsal and ventral streams. [28] These algorithms were built around a CNN, consisting of a hierarchical feed-forward data processing path, containing two bracketed pairs of convolution operator, followed by a pooling layer. [29] However, they were

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Programmable Photoelectric Memristor Gates for In Situ Image Compression

Cited by 11 publications

References 37 publications

Memristive System Based Image Processing Technology: A Review and Perspective

Memristive System Based Image Processing Technology: A Review and Perspective

A multifunctional optical‐thermal logic gate sensor array based on ferroelectric BiFeO₃ thin films

Hieroglyphically Supervised Bioinspired Visioneural Controller

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Programmable Photoelectric Memristor Gates for In Situ Image Compression

Cited by 11 publications

References 37 publications

Memristive System Based Image Processing Technology: A Review and Perspective

Memristive System Based Image Processing Technology: A Review and Perspective

A multifunctional optical‐thermal logic gate sensor array based on ferroelectric BiFeO3 thin films

Hieroglyphically Supervised Bioinspired Visioneural Controller

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Product

Resources

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A multifunctional optical‐thermal logic gate sensor array based on ferroelectric BiFeO₃ thin films