Present study focuses on the effects of interfacial ferroelectric BTO layer on the electrical characteristics of Au/n-Si structures, hence Au/n-Si (MS) and Au/BTO/n-Si (MFS) structures were fabricated and admittance measurements (capacitance-voltage: C-V and conductance-voltage: G/ω-V) of both structures were conducted between 10 kHz and 1 MHz at room temperature. Results showed that C-V and G/ω-V characteristics were affected not only by frequency but also through deposition of BTO layer. Some effects can be listed as sharper peaks in C-V plots, higher capacitance and conductance values. Structure's series resistance (R s ) also decreased due to BTO layer. Interface states (N ss ) profiles of the structures were obtained using Hill-Coleman and high-low frequency capacitance (C HF -C LF ). Some of the main electrical parameters were extracted from C −2 -V plots using depletion capacitance approach. Furthermore, current-voltage characteristics of MS and MFS structures were presented. Keywords. Metal-ferroelectric-semiconductor (MFS) structures; Bi 4 Ti 3 O 12 (BTO); series resistance; interface states.