2017
DOI: 10.1109/tpds.2016.2635640
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Projective Networks: Topologies for Large Parallel Computer Systems

Abstract: The interconnection network comprises a significant portion of the cost of large parallel computers, both in economic terms and power consumption. Several previous proposals exploit large-radix routers to build scalable low-distance topologies with the aim of minimizing these costs. However, they fail to consider potential unbalance in the network utilization, which in some cases results in suboptimal designs. Based on an appropriate cost model, this paper advocates the use of networks based on incidence graph… Show more

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Cited by 15 publications
(8 citation statements)
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“…We have already heard that the diameter serves as a proxy for worst-case message latency. The combination of low degree and low diameter motivates the study of Moore graphs as potential interconnection networks (see, e.g., [7]).…”
Section: Basic Definitions Concepts and Notationmentioning
confidence: 99%
“…We have already heard that the diameter serves as a proxy for worst-case message latency. The combination of low degree and low diameter motivates the study of Moore graphs as potential interconnection networks (see, e.g., [7]).…”
Section: Basic Definitions Concepts and Notationmentioning
confidence: 99%
“…Recently, apart from hierarchical topologies, such as Dragonflies [23], Slim-flies [6], or Projective networks [8], hybrid topologies have been proposed to get the benefits from both direct and indirect topologies. In general, the objective of hybrid topologies is to provide high-performance like indirect topologies, but at a similar cost compared to direct topologies.…”
Section: Kns Network Topologiesmentioning
confidence: 99%
“…In [9], it was shown that, if all compute nodes inject at the same rate as network links, then T N = ∆u k results in a well balanced network, where k is the average distance, ∆ is the graph degree and u is the average link utilization. Since in RRGs k is close to the diameter D and u is relatively large, which has been experimentally observed to be about 0.7, this expression can be approximated by ∆/D compute nodes per switch.…”
Section: Scalability Latency and Costmentioning
confidence: 99%