The continuously intensifying demand for high-performance and miniaturized semiconductor devices has pushed the aggressive downscaling of field-effect transistors (FETs) design. However, the detrimental short-channel effects and the fundamental limit on the sub-threshold swing (SS) in FET have led to a drastic increase in static and dynamic power consumption. The operational limit of nanoscale transistors motivates the exploration of post-CMOS devices like Tunnel FET (TFET), having steeper SS and immunity toward short channel effects. Thus the field of nanoscale 2D-TFET has gained compelling attention in recent times. The nanoscale TFET, with two-dimensional (2D) semiconductor materials, has shown a significant improvement in terms of higher on-state current and lower sub-threshold swing. In this context, the review presented here has comprehensively covered the gradual development and present state-of-arts in the field of nanoscale 2D-TFET design. The relative merits and demerits of each class of 2D materials are identified, which sheds light on the specific design challenges associated with individual 2D materials. Subsequently, the potential device/material co-optimization strategies for the development of efficient TFET designs are highlighted. Next, the experimental development in 2D-TFET design is discussed, and specific synthesis/fabrication challenges for individual material systems are indicated. Finally, an extensive comparative performance study is presented between the simulated as well as experimentally reported potential 2D materials and state-of-the-art bulk material-based TFETs.