2007
DOI: 10.1109/tcsii.2006.885397
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Propagation Delay of an <emphasis>RC</emphasis>-Chain With a Ramp Input

Abstract: In this brief, two simple semi-analytical models which allow the estimation of the propagation delay of an RC-chain with a linear input are presented. The closed-form models can be used to evaluate the propagation delay of wires in modern VLSI and ULSI processes. The two approximations, a continuous function and a piecewise function, exhibit a maximum error lower than 15% at the end of the chain. The models have been validated extensively through circuit simulations. In particular, 1000 different RC-chains hav… Show more

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Cited by 29 publications
(28 citation statements)
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“…In order to evaluate the output propagation delay of a first-order circuit driven by a linear ramp input, let us consider the time domain response developed in [10] and synthesized in the Appendix, where the time constant, RC, of the circuit as been named . The output propagation delay, PDout , is defined as the time interval between the application of the input and the instant when the output reaches the 50% of its final value; hence, solving (A5) under the condition y RAMP ( PDout ) = 0.5, we get…”
Section: Output Propagation Delay and Propagation Delaymentioning
confidence: 99%
See 3 more Smart Citations
“…In order to evaluate the output propagation delay of a first-order circuit driven by a linear ramp input, let us consider the time domain response developed in [10] and synthesized in the Appendix, where the time constant, RC, of the circuit as been named . The output propagation delay, PDout , is defined as the time interval between the application of the input and the instant when the output reaches the 50% of its final value; hence, solving (A5) under the condition y RAMP ( PDout ) = 0.5, we get…”
Section: Output Propagation Delay and Propagation Delaymentioning
confidence: 99%
“…the delay of the input to reach 50% of its final value). It can be numerically calculated using Equation (1) in the two ranges, and the result gives the plots in Figure 2 where the normalized propagation delay, PD / , versus the normalized input ramp slope, T / , is shown [10]. To put in evidence that the normalized propagation delay is almost constant for values lower than 1 and higher than 10, the normalized propagation delay is plotted using both linear scale (Figure 2(a)) and logarithm scale (Figure 2(b)).…”
Section: Output Propagation Delay and Propagation Delaymentioning
confidence: 99%
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“…It also makes the analysis of cascaded stages much simpler (such as optimal repeater insertion, as discussed later in section 8.5, as the delay of one driver plus interconnect stage is assumed independent of the waveform of the previous stage. In those cases where the approximation is not accurate enough, one can use more complex models that take finite rise-times into account [47][48][49][50].…”
Section: Classical Delay Modelsmentioning
confidence: 99%