PROTEUS: programmable hardware for telecommunication systems

Abstract

This paper discusses a new architecture for programmable hardware targeted at high-speed digital telecommunication systems and describes a preliminary design. The basic architecture of the programmable hardware is proposed based on the characteristics of functions and an analysis of logic used in actual communication subsystems performing high-speed bit level operations. The proposed architecture, called PROTEUS, includes a pipeline structure of logic and latch groups, and a 2-stage logic block structure that consists of small LUTs and wide gates. The design strategy of a prototype chip and the CAD techniques used to achieve the required pelformance are also discussed.

A simultaneous placement and global routing algorithm with path length constraints for transport-processing FPGAs

“…The proposed algorithm has been implemented on SUN Sparc Station 2 (28.5 MIPS) in C language and experimented on PROTEUS, a transport-processing FPGA chip [4], [8], [9]. Table I summarizes puts, LUTs, and latches (#inputs, #outputs, #LUTs, and #FFs, respectively) of transport-processing circuits to be experimented.…”

“…1 based on an FPGA chip proposed in [4], [8], [9]. The model has a two-dimensional array of basic cells.…”

“…As application-specific field-programmable gate arrays (FPGAs), transport-processing FPGAs have been proposed [4], [8], [9].1 In contrast with conventional FPGAs as in [lo], transport-processing FPGAs have finer granularity of logic functions so that they implement more flexible circuits on them. Since transport data processing has strong direction of signal flows, input terminals ~ FPGAs called PROTEIJS have been developed for transport processing [4] ,[SI, [Y].…”

“…Since transport data processing has strong direction of signal flows, input terminals ~ FPGAs called PROTEIJS have been developed for transport processing [4] ,[SI, [Y].…”

The Plastic Cell Architecture for dynamic reconfigurable computing

“…We have proposed both types of reconfigurable systems for programmable telecommunication systems, namely, FPGA-type [1], and processor type [2]. Moreover, we also engaged in developing an HDL-based CAD system [3].…”