Pulsed laser techniques for nanographoepitaxy

Abstract

Graphoepitaxy is a technique that has been demonstrated as a means for fashioning regions of single crystal semiconductors on amorphous substrates. In that earlier work the heating period was long ͑1 s or more͒ and the substrate needed to be held close to the melting point of the semiconductor. With a view to achieving three-dimensional integrated circuits, the authors have investigated the possibility using graphoepitaxy to yield device quality single crystal islands of silicon on an amorphous substrate without excessive heating of the underlying layers by using transient ͑Ͻ1 ms͒ heating. A stationary laser pulse of 532 nm wavelength, 100 s duration, and 22 m diameter impinged on a 50 nm thick amorphous silicon film deposited on 12 nm thick SiO 2 inverted pyramid template. We demonstrated successful graphoepitaxial orientation of crystallized silicon but only under conditions that gave excessive heating ͑Ͼ400°C͒ of lower layers, thus indicating that this technique is impractical for three-dimensional integrated circuits.

Low-temperature Al–Ge bonding for 3D integration

“…4,5 A monolithic 3DIC approach, where circuit layers are fabricated sequentially on a single wafer, allows for device level vertical integration that maximizes the benefits of going 3D. 7,8 Instead, we pursued an alternative approach of attaching high-quality crystal islands to serve as the semiconducting material for upper layer device fabrication of a monolithic 3DIC. 6 The greatest challenge to achieve monolithic 3DICs is obtaining single-crystal, device-quality semiconductor material on upper circuit layers without damaging circuits below (about 400 C temperature limit).…”