PWM-control methods for common mode voltage minimization - a survey

Hofmann, W.; Zitzelsberger, J.

doi:10.1109/speedam.2006.1649943

Cited by 26 publications

(14 citation statements)

References 8 publications

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“…An Active Zero State PWM (AZSPWM) scheme uses two adjacent active voltage vectors and two near opposing active vectors [11]- [14]. The active voltage vectors that are 120…”

Section: B Reduced CM Voltage Pwm Schemesmentioning

confidence: 99%

An Integrated Inductor for Parallel Interleaved VSCs and PWM Schemes for Flux Minimization

Gohil

Bede

Teodorescu

et al. 2015

IEEE Trans. Ind. Electron.

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Abstract-The interleaving of the carrier signals of the parallel Voltage Source Converters (VSCs) can reduce the harmonic content in the resultant switched output voltages. As a result, the size of the line filter inductor can be reduced. However, in addition to the line filter, an inductive filter is often required to suppress the circulating current. The size of the system can be reduced by integrating these two inductors in a single magnetic component. A integrated inductor, which combines the functionality of both the line filter inductor and the circulating current filter inductor is presented. The PulseWidth Modulation (PWM) schemes to reduce the flux in some parts of the integrated inductor are also analyzed. The flux reduction achieved by using these schemes is demonstrated by comparing these schemes with the conventional space vector modulation and the 60• clamped discontinuous PWM scheme. The impact of these PWM schemes on the harmonic performance is also discussed. Simulation and experimental results are presented to validate the analysis.

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“…An Active Zero State PWM (AZSPWM) scheme uses two adjacent active voltage vectors and two near opposing active vectors [11]- [14]. The active voltage vectors that are 120…”

Section: B Reduced CM Voltage Pwm Schemesmentioning

confidence: 99%

An Integrated Inductor for Parallel Interleaved VSCs and PWM Schemes for Flux Minimization

Gohil

Bede

Teodorescu

et al. 2015

IEEE Trans. Ind. Electron.

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“…The value of I I inductor L is determined by (7) and the value of L1 is selected by (14) to satisfy both the formula (13) and the requests for reducing the loss, weight and cos5> of common-mode transformer. For a given damping ratio @, the value of resistor R is determined by (15).…”

Section: Vcc(s) 3(l -M)cs2+3rcs+lmentioning

confidence: 99%

A New Approach to Mitigate CM and DM Voltage dv/dt Value in PWM Inverter Drive Motor Systems

Gao

2007

APEC 07 - Twenty-Second Annual IEEE Applied Power Electronics Conference and Exposition

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In this paper, a novel passive filter installed at PWM inverter output terminals was proposed with an objective of reducing the high common-mode(CM) and differentialmode(DM) voltage dv/dt value generated by PWM inverter simultaneously. For determining the parameters of the passive filter, the filter transfer function was utilized to achieve a desirable filtering performance. The detailed design procedure of the filter parameters was given. The validity and effectiveness of the proposed filter were supported by the simulation and experimental results carried out on 380V/3kW induction motor system. Further investigations also demonstrate that by making the line-to-line output voltage of inverter sinusoidal, the proposed filter permits motor to be connected with inverter through a long cable. By lowing the dv/dt value of CM and DM voltage, the sideeffects induced by them such as shaft voltage, bearing current CM leakage current and over-voltage at motor terminals could be mitigated effectively.Index Terms -passive filter, over-voltage, common-mode voltage, differential-mode voltage, PWM inverter.

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“…RCMV-PWM algorithms can be divided into three groups: active zero state PWM (AZSPWM) algorithms [7]- [16], remote state PWM (RSPWM) algorithms [14], and near state PWM (NSPWM) algorithms [12], [14], [16]. In addition, the AZSPWM algorithms can be further divided into AZSPWM1 [7]- [14], [16], AZSPWM2 [13]- [15], and AZSPWM3 [8], [13], [14] algorithms. When these algorithms synthesize the reference voltage vector, the AZSPWM algorithms use three or four active voltage vectors including two active opposite voltage vectors instead of zero voltage vectors.…”

Section: Introductionmentioning

confidence: 99%

A New Active Zero State PWM Algorithm for Reducing the Number of Switchings

Yun¹,

Baik²,

Kim³

et al. 2017

Journal of Power Electronics

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To reduce common-mode voltage (CMV), various reduced CMV pulse width modulation (RCMV-PWM) algorithms have been proposed, including active zero state PWM (AZSPWM) algorithms, remote state PWM (RSPWM) algorithms, and near state PWM (NSPWM) algorithms. Among these algorithms, AZSPWM algorithms can reduce CMV, but they increase the number of switchings compared to the conventional space vector PWM (CSVPWM). This paper presents a new AZSPWM algorithm for reductions in both the CMV and total number of switchings in BLAC motor drives. Since the proposed AZSPWM algorithm uses only active voltage vectors for motor control, it reduces CMV by 1/3 compared to CSVPWM. The proposed AZSPWM algorithm also reduces the total number of switchings compared to existing AZSPWM algorithms by eliminating the switchings required from one sector to the next. The performance of the proposed algorithm is verified by analyses, simulations, and experimental results.

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PWM-control methods for common mode voltage minimization - a survey

Cited by 26 publications

References 8 publications

An Integrated Inductor for Parallel Interleaved VSCs and PWM Schemes for Flux Minimization

An Integrated Inductor for Parallel Interleaved VSCs and PWM Schemes for Flux Minimization

A New Approach to Mitigate CM and DM Voltage dv/dt Value in PWM Inverter Drive Motor Systems

A New Active Zero State PWM Algorithm for Reducing the Number of Switchings

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