An Integrated Inductor for Parallel Interleaved VSCs and PWM Schemes for Flux Minimization

Abstract

Abstract-The interleaving of the carrier signals of the parallel Voltage Source Converters (VSCs) can reduce the harmonic content in the resultant switched output voltages. As a result, the size of the line filter inductor can be reduced. However, in addition to the line filter, an inductive filter is often required to suppress the circulating current. The size of the system can be reduced by integrating these two inductors in a single magnetic component. A integrated inductor, which combines the functionality of both the line filter inductor and the circulating current filter inductor is presented. The PulseWidth Modulation (PWM) schemes to reduce the flux in some parts of the integrated inductor are also analyzed. The flux reduction achieved by using these schemes is demonstrated by comparing these schemes with the conventional space vector modulation and the 60• clamped discontinuous PWM scheme. The impact of these PWM schemes on the harmonic performance is also discussed. Simulation and experimental results are presented to validate the analysis.

Lifetime-Based Power Routing in Parallel Converters for Smart Transformer Application

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Dual Converter Fed Open-End Transformer Topology with Parallel Converters and Integrated Magnetics

“…Using (14), the voltages across the coil x 1 and x 3 are obtained and substituting the leg currents in these equation yield…”

Space‐vector‐based hybrid PWM for reduced line current ripple and common mode voltage in paralleled interleaved three‐phase two‐level converter

“…Parallel interleaved three-phase inverters form a popular topology in many different applications, such as large drives, high power renewable energy generation and uninterruptable power supplies. The paralleled interleaved three-phase converters share a common DC-link capacitor and the bridge outputs of the inverter are connected via common-mode (CM) inductors, which improve the flexibility and redundancy of the systems [1][2][3][4][5][6][7][8][9][10].…”

“…The decentralised system has two independent controllers, where the primary issue is the asynchronous carriers of two controllers and the research focus on control strategies to synchronise the two carriers [1][2][3]. The centralised architecture does not suffer from asynchronous carriers, and research [4][5][6][7][8][9][10] focusses on the optimisation of vector sequences for key indicators, such as line-current ripple, ZSCC and CMV.…”