Q-Selector-Based Prefetching Method for DRAM/NVM Hybrid Main Memory System

Kim, Jeong‐Geun; Kim, Shin-Dug; Yoon, Su-Kyung

doi:10.3390/electronics9122158

Cited by 3 publications

(2 citation statements)

References 21 publications

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“…Recently, PCMs have been studied for use in the hybrid main memory of highperformance embedded systems because they have characteristics, such as low leakage power, high density, and non-volatility, compared to DRAMs [12][13][14][15][16]. Table 1 presents the details of the comparison of DRAMs and PCMs.…”

Section: Phase Change Memorymentioning

confidence: 99%

“…Therefore, researchers have proposed a hybrid main memory architecture for resolving the limitations of DRAM and improving the performance of DRAM alone main memory [8][9][10][11]. Phase change memory (PCM) is an attractive memory for embedded systems owing to its advantages, such as non-volatility, high density, and low power consumption [12][13][14][15][16]. However, PCMs have disadvantages, such as limited write endurance and high write latency compared to DRAMs.…”

Section: Introductionmentioning

confidence: 99%

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TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded Systems

2021

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Recently, high-performance embedded systems have adopted phase change memory (PCM) as their main memory because PCMs have attractive advantages, such as non-volatility, byte-addressability, high density, and low power consumption. However, PCMs have disadvantages, such as limited write endurance in each cell and high write latency compared to DRAMs. Therefore, researchers have investigated methods for enhancing the limitations of PCMs. In this paper, we propose a page replacement policy called tendency-aware CLOCK (TA-CLOCK) for the hybrid main memory of embedded systems. To improve the limited write endurance of PCMs, TA-CLOCK classifies the page access tendency of the victim page through access pattern analysis and determines the migration location of the victim page. Through the classification of the page access tendency, TA-CLOCK reduces unnecessary page migrations from DRAMs to PCMs. Unnecessary migrations cause an increase in write operations in PCMs and the energy consumption of the hybrid main memory in embedded systems. Thus, our proposed policy improves the limited write endurance of PCMs and enhances the access latency of the hybrid main memory of embedded systems by classifying the page access tendency. We compared the TA-CLOCK with existing page replacement policies to evaluate its performance. In our experiments, TA-CLOCK reduced the number of write operations in PCMs by 71.5% on average, and it enhanced the energy delay product by 38.3% on average compared with other page replacement policies.

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Section: Phase Change Memorymentioning

confidence: 99%