Quality-effective repair of multichip module systems

Abstract

This paper proposes a new analytical approach f o r evaluating ihe effects of a repair process on the defect level of multichip module ( M C M ) systems ai assembly. Repair of M C M s is usually required to improve the yield and quality of ihese systems, while preserving cost effectiveness. In the proposed approach, we develop a novel quality model, which is solved analytically in O ( r N 3 ) (where T is the maximum number of allowed repair cycles and N is the number of chips in ihe MCM). The proposed model is based on a previously proposed qualiry model [20] f o r M C M s which did noi incorporate ihe effect of a repair process on the defeci level. The proposed model relates ihe defect level to various figures of merit of repais such as the probability of successfully repairing a fault (referred IO as repairability), the probability of damaging the system and the maximum allowed number of repair cycles. Parametric results show that due io the repair process the overall defect-level decreases as the M C M yield increases; howeves there exists a bound in the number of repair cycles, io permit an increase iri repairability. Using these resulis, it is possible io predict a more accuraie value of ihe defeci level of MCMs by taking inio account the differeni parameters affeciing ihe repair process, while realisiically reducing ihe defeci level of the final M C M produci.

Modeling and Evaluation of Threshold Defect Tolerance

“…To meet the challenges of future technologies for circuits we need a robust approach for the realization of defect level with high confidence of a circuit [1,2,3,4,5,6,7]. The needs of emerging technologies are centered around defect tolerance, both in the manufacturing stage and during operation.…”