Quantitative Analysis of Run-Time Reconfigurable Database Search

Shirazi, N.; Luk, Wayne; Benyamin, D.; Cheung, Peter Y. K.

doi:10.1007/978-3-540-48302-1_26

Cited by 2 publications

References 2 publications

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Framework and tools for run-time reconfigurable designs

Shirazi

Luk

Cheung

2000

IEE Proc., Comput. Digit. Tech.

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This paper describes a framework and tools for automating the production of designs that can be partially recon gured at run time. The approach involves several stages, including: (i) a partial evaluation stage, which produces con guration les for a given design, where the number of con gurations are minimised during the compile-time sequencing stage (ii) an incremental con guration calculation stage, which takes the output of the partial evaluator and generates an initial con guration le and incremental con guration les that partially update preceding con gurations (iii) an optimisation stage for devices or systems supporting simultaneous conguration of multiple components. While many of our techniques are independent of the design language and device used, experimental tools have been developed that target Xilinx 6200 devices. Simultaneous con guration, for example, can be used to reduce the time for recon guring an adder to a subtractor from time linear with respect to its size to constant time at best and logarithmic time at worst. Our tools have been used in developing a variety of designs, including arithmetic, video and database applications.

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Framework and tools for run-time reconfigurable designs

Shirazi

Luk

Cheung

2000

IEE Proc., Comput. Digit. Tech.

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Adaptive image filtering using run-time reconfiguration

Srivastava

Trahan

Vaidyanathan

et al.

Proceedings International Parallel and Distributed Processing Symposium

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This thesis implements an adaptive linear smoothing image filtering algorithm, on a Virtex™-E FPGA using run-time reconfiguration (RTR). An adaptive filter uses a filtering window that runs over the entire image pixel-by-pixel, generating new (filtered) values of the pixels. As the name suggests, an adaptive filter can adapt to the varying nature of an image by adjusting the coefficients of the filtering window depending upon the local variance in the intensity values of pixels. It filters an image in a non-uniform fashion providing greater smoothing in largely uniform areas of the image and lesser smoothing when it encounters edges and step changes in the image. These continual changes, in the coefficient values of the adaptive filter pose a problem in utilizing run-time reconfiguration (RTR) for its implementation, as benefits of RTR emerge only with considerable computing time between reconfigurations. This thesis provides a solution to this problem and reduces the running time of the algorithm through aggressive use of RTR. This work provides details on the RTR implementation of an adaptive filter, along with an estimate of running time and hardware resource requirements, when synthesized on the Virtex™-E FPGA. We use a 3× 3 size filtering window, and a 256× size gray scale image as a specific case, achieving speedup of 31 and 84 over pure software implementations running on Pentium III and Sun Ultra systems respectively. 256 iv Configuration Input Configuration circuitry Reconfiguring context 2 while operating configuration context 1 Reconfiguring context 1 while operating configuration context 2

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Quantitative Analysis of Run-Time Reconfigurable Database Search

Cited by 2 publications

References 2 publications

Framework and tools for run-time reconfigurable designs

Framework and tools for run-time reconfigurable designs

Adaptive image filtering using run-time reconfiguration

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